Register Summary; A.1 Lsifc929 Multifunction Pci Registers - LSI LSIFC929 Technical Manual

Table A.1 LSIFC929 Multifunction PCI Registers
Register Name
Device ID/Vendor ID
Status/Command
Class Code/Revision ID
BIST/Header/Latency/Cache Line Size
I/O Base Address
Mem0 Base Address Low
Mem0 Base Address High
Mem1 Base Address Low
Mem1 Base Address High
Reserved
Subsystem ID/Vendor ID
Expansion ROM Base Address
Appendix A

Register Summary

Tables A.1 and A.2 list the register summary for the LSIFC929.
LSIFC929 Dual Channel Fibre Channel I/O Processor
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
Address Read/Write
0x000 Read Only
0x004 Read/Write
0x008 Read/Write
0x00C Read/Write
0x010 Read/Write
0x014 Read/Write
0x018 Read/Write
0x01C Read/Write
0x020 Read/Write
0x024–0x028 Read Only
0x02C Read Only
0x030 Read Only
Page
5-9
5-10
5-13
5-14
5-15
5-16
5-17
5-18
5-16
5-19
5-19
5-18
A-1