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5.4 Unsupported PCI Commands
5.5 Programming Model
5.6 PCI/Multifunction PCI Configuration Registers
The LSIFC929 does not respond to reserved commands, special cycle,
or interrupt acknowledge commands as a slave. It will never generate
these commands as a master.
The LSI Logic Fusion-MPT specification includes all necessary hardware
registers, shared memory and associated memory addresses from the
host (using system addresses) viewpoint. The host programming model
consists of
PCI/Multifunction PCI Configuration
Registers, and a
Shared Memory
The Configuration registers are accessible only by the system BIOS
during PCI configuration cycles, and are not available to the user at any
time. No other cycles can access these registers.
Note:
The configuration register descriptions provide general
information only, to indicate which PCI configuration
addresses are supported in the LSIFC929.
the PCI configuration registers implemented by the
LSIFC929. Addresses 0x048 through 0x07F are not
defined.
All PCI-compliant devices, such as the LSIFC929, must support the
Device ID/Vendor
ID, Command, and
PCI-compliant registers is optional. In the LSIFC929, registers that are
not supported are not writable and return all zeroes when read. Only
those registers and bits that are currently supported by the LSIFC929 are
described in this chapter. For more detailed information on PCI registers,
please see the PCI Local Bus Specification.
PCI configuration space provides identification, configuration,
initialization, and error management functions for PCI devices. The
LSIFC929 provides configuration registers as defined in
Unsupported PCI Commands
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
Registers,
region.
Status
Registers. Support of other
Host Interface
Table 5.2
shows
Table
5.2.
5-7
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