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1. Stresses beyond those listed above may cause permanent damage to the device. These are stress
ratings only; functional operation of the device at these or any other conditions beyond those
indicated in the Operating Conditions section of the manual is not implied.
2. − 3 V < V
< 6.6 V.
PIN
Table 6.2
Operating Conditions
Symbol
Parameter
V
Core supply voltage
DDC
V
I/O supply voltage
DDIO
PCI5VREF
PCI 5 V reference voltage
T
Operating free air
A
θ
2
Thermal resistance
JA
(junction to ambient air)
1. Conditions that exceed the operating limits may cause the device to function incorrectly.
2. θ
assumes a 4-layer package substrate, a 329-pad PBGA, and a 4-layer PCB design
JAmax
(10–12 watt/meter ˚K).
Table 6.3
Capacitance
Symbol
Parameter
C
Input capacitance of input pads
I
C
Input capacitance of I/O pads
IO
Table 6.4
Input Signals (FAULT1/, FAULT0/, ROMSIZE[1:0], ARMEN/, FSELZ[1:0],
MODE[7:0], SWITCH, HOTSWAPEN/)
Symbol
Parameter
V
Input high voltage
IH
V
Input low voltage
IL
I
Input leakage
IN
6-2
1
Specifications
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
Min
Max
2.37
2.63
3.13
3.47
4.75
5.25
–
VDDIO
0
70
–
20
Min
Max
–
7
–
10
Min
Max
0.7 V
V
+ 0.3
DD
DD
− 0.3
V
0.2 V
SS
DD
10
10
Unit
Test Conditions
V
–
V
–
V
5 V PCI System
V
3.3 V PCI System
˚C
–
˚C/W
–
Unit
Test Conditions
pF
–
pF
–
Unit
Test Conditions
V
–
V
–
µA
–
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