Multifunction Pci; Lsifc929 Pci Configuration Register Map - LSI LSIFC929 Technical Manual

Dual channel fibre channerl i/o processor
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5.6.1 Multifunction PCI

Table 5.2
LSIFC929 PCI Configuration Register Map
31
Device ID = 0x06nn
Status
BIST
Subsystem ID
Max Latency
Power Management Capabilities
PM Data
5-8
The LSIFC929 supports multifunction capability on the PCI bus. Both
Function[0] and Function[1] have identical looking configuration space
memory maps, and most of the data reported in these registers by the
LSIFC929 is also the same. The only exceptions are the Device ID, Class
Code, Subsystem ID, and Subsystem Vendor ID. Each of these values
can be set separately for each function within the serial EEPROM, which
is downloaded into these registers before any configuration cycles are
completed. While the Class Code, Subsystem ID, and the Subsystem
Vendor ID can all be set to any value, the Device ID is more restrictive.
The upper 15 bits are hardcoded to a value of 0x0622, but the least
significant bit (bit 16) can be programmed to either a 0 or a 1 to provide
two possible Device ID values of 0x0622 or 0x0623.
16 15
Class Code
Header Type
I/O Base Address
Mem0 Base Address Low
Mem0 Base Address High
Mem1 Base Address Low
Mem1 Base Address High
Reserved
Reserved
Expansion ROM Base Address
Reserved
Reserved
Min Grant
PMCSR-BSE
Reserved
Registers
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
Vendor ID = 0x1000
Command
Latency Timer
Subsystem Vendor ID
Interrupt Pin
Next Item Ptr
Power Management Control/Status
0 Address
Revision ID
Cache Line Size
0x00C
0x01C
0x02C
CapPtr
Interrupt Line
0x03C
Capability ID
0x048–
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
0x028
0x030
0x034
0x038
0x040
0x044
0x07F

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