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Register: 0x008
Class Code/Revision ID
Read/Write
31
ClCode (Most Significant)
0
0
0
0
15
ClCode (Least Significant)
0
0
0
0
ClCode
RevID
Register: 0x00C
BIST/Header/Latency/Cache Line Size
Read/Write
31
BIST
0
0
0
0
15
LatTim
0
0
0
0
PCI/Multifunction PCI Configuration Registers
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
24
0
0
0
1
8
0
0
0
0
Class Code (Read Only)
This register is used to identify the generic function of the
device. The upper byte of this register is a base class
code, the middle byte is a subclass code, and the lower
byte identifies a specific register level programming
interface. The value defaults to 0x010000 unless
firmware programs it to a different value prior to PCI
configuration, or it is changed using serial EPROM.
Revision ID (Read Only)
This register specifies device and revision identifiers. In
the LSIFC929, the upper nibble will be 0b0000. The lower
nibble reflects the current revision level of the device.
24
0
0
0
0
8
0
0
0
0
23
ClCode (Middle)
0
0
0
0
7
RevID
0
0
0
0
23
HdTyp
1
0
0
0
7
Cache
0
0
0
0
16
0
0
0
0
0
x
x
x
x
[31:8]
[7:0]
16
0
0
0
0
0
0
0
0
0
5-13
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