Jtag Test And I/O Processor Debug - LSI LSIFC929 Technical Manual

Table 4.6

JTAG Test and I/O Processor Debug

Signal I/O
TCK I
TRST/ I
TDI I
TDO O
TMS_CHIP I
TMS_ICE I
IDDTN I
PROC_DRVLS O
BGA Pad
Number Pad Type Description
D3 3.3 V
Schmitt
w/pullup
C1 3.3 V
Schmitt
w/pullup
D1 3.3 V
Schmitt
w/pullup
E3 3.3 V
4 mA T/S
Output
w/pullup
B1 3.3 V
Schmitt
w/pullup
D2 3.3 V
Schmitt
w/pullup
B2 Input
w/"large"
pulldown
C2
Copyright © 2000, 2001 by LSI Logic Corporation. All rights reserved.
JTAG/CtxMgr Debug Test Clock.
JTAG/Debug Test Reset. Asynchronous
active-LOW.
JTAG/CtxMgr Debug Test Data In.
JTAG/CtxMgr Debug Test Data Out.
JTAG Test Mode Select.
CtxMgr Debug Test Mode Select.
QIDD Test Enable.
Process Monitor Test Output Driver.
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