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Specifications
C.5.3
AGC Output
A programmable DC output, proportional to the RX signal level, is located on the rear
panel at 10 mA maximum (0 to 10 volts).
C.6
Interface Specifications
C.6.1
Interface General
C.6.2
Transmit Clock Source
The TX clock can be selected by the operator from the following sources.
•
•
C.6.3
Send Clock Timing Source
The send clock timing output can be generated from the Frequency Reference (either via
the front panel or remotely).
If loop timing is selected the send clock timing output can be:
•
•
If the Asymmetrical Loop Timing (ASLT) option is selected, either via the front panel or
remotely, the send clock timing output can be referenced from:
•
•
C–38
Default Level
Low Level (0V)
High Level (10V)
Terrestrial. Must be ± 100 PPM of the programmed rate, ≤ 5% jitter.
SCT (internal). ± 10 PPM or SCT (with high stability option). ± 0.2 PPM.
The external clock input must be ± 100 PPM of the selected data rate.
The RX satellite clock, RX data rate must be ± 100 PPM of the TX data rate.
The external clock input, (Master Clock), which can be any multiple of 8 kHz as
long as it is ≥ 64 kHz ≤ 4.376 MHz or any multiple of 600 Hz as long as it is
≥ 2.4 kHz ≤ 64 kHz.
The RX clock which can be any multiple of 8 kHz as long as it is ≥ 64 kHz
≤ 4.376 MHz or any multiple of 600 Hz as long as it is ≥ 2.4 kHz ≤ 64 kHz.
0 volts for –60 dBm
10 volts for –25 dBm
Programmed from 0 to 10V in 0.5V increments.
Programmed from 0 to 10V in 0.5V increments.
SDM-300A Satellite Modem
Rev. 4
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