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SDM-300A Satellite Modem
The data and clock signals (MUXDATA and MUXCLK) come from the multiplexer on
the main PCB, and are sent to the Reed-Solomon encoder section. Since the data input to
the Reed-Solomon encoder is serial, the data passes through a self-synchronizing serial
scrambler, in accordance with INTELSAT-308 Rev. 6B specification.
The host software allows the scrambler to be turned on or off at the front panel as
required by the user. If the scrambler is disabled, the data passes through the scrambler
unaltered.
The data then passes through a serial/parallel converter, and on to a FIFO. The
serial/parallel converter changes the data to an 8-bit word. A synchronous FIFO buffers
the incoming data, because the rate is different than the encoded data rate. Once buffered
by the FIFO, the data passes to the Reed-Solomon Codec.
Refer to Figure A-16 for the Reed-Solomon code page format. The Reed-Solomon outer
Codec reads the data in blocks of k bytes, and calculates and appends check bytes to the
end data block. The letter n represents the total number of bytes in a given block of data
out of the Codec. The letter k represents the number of data bytes in a given block.
The term, n - k = 2t, is the total number of check bytes appended to the end of the data.
This is referred to as the "Reed-Solomon overhead." The term's k, n, and t will vary,
depending on the Reed-Solomon coding used. The output data is passed to a block
interleaver.
Since errors from the Viterbi decoder usually occur in bursts, a block interleaver with a
depth of four is used in accordance with the INTELSAT-308 Rev. 6B specification. The
interleaver has the effect of spreading out the errors across blocks of data instead of
concentrating the errors in a single block of data. Since there are fewer errors in any
given block, there is a greater chance that the Reed-Solomon decoder can correct the
errors on the receiving end of the satellite link. To allow the decoder to synchronize to
the data, four unique words are inserted in the last two bytes of the last two pages at the
end of each page of data (refer to Figure A-17).
Once the data passes through the interleaver, it is fed through a parallel/serial converter
and sent back to the interface PCB. After further processing by the interface PCB, the
data is sent to the modulator PCB.
Rev. 4
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