Comtech EF Data SDM-300A Installation And Operation Manual page 13

Hide thumbs Also See for SDM-300A:
Table of Contents

Advertisement

SDM-300A
Preface
Figure 3-20. Utility System Menu ......................................................................................................................... 3-60
Figure 3-21. Utility Modem Type Menu................................................................................................................ 3-66
Figure 3-22. Utility Factory Setup Menu ............................................................................................................... 3-71
Figure 3-23. RF Loopback ..................................................................................................................................... 3-72
Figure 3-24. IF Loopback ...................................................................................................................................... 3-72
Figure 3-25. Baseband Loopback .......................................................................................................................... 3-73
Figure 3-26. Interface Loopback............................................................................................................................ 3-73
Figure 3-27. EIA-422, EIA-232, or V.35 Master/Master Clocking Diagram ........................................................ 3-88
Figure 3-28. EIA-422, EIA-232, or V.35 Master/Slave Clocking Diagram........................................................... 3-89
Figure 3-29. IDR/IBS G.703 Master/Master Clocking Diagram ........................................................................... 3-90
Figure 3-30. IDR/IBS G.703 Master/Slave Clocking Diagram.............................................................................. 3-91
Figure 3-31. D&I G.703 Master/Master Clocking Diagram .................................................................................. 3-92
Figure 3-32. Clock Slip .......................................................................................................................................... 3-94
Figure 3-33. Doppler Shift ..................................................................................................................................... 3-95
Figure 4-1. M&C Block Diagram ............................................................................................................................ 4-2
Figure 4-2. Modulator Block Diagram..................................................................................................................... 4-5
Figure 4-3. Demodulator Block Diagram................................................................................................................. 4-8
Figure 4-4. Interface Block Diagram ..................................................................................................................... 4-13
Figure 5-1. Fault Isolation Test Setup...................................................................................................................... 5-2
Figure 5-2. Typical Output Spectrum (with Noise) ................................................................................................. 5-5
Figure 5-3. Typical Output Spectrum (without Noise) ............................................................................................ 5-5
Figure 5-4. Typical Eye Constellations.................................................................................................................... 5-7
Figure A-3. E1 Framing Formats .......................................................................................................................... A-16
Figure A-4. T1 Framing Formats .......................................................................................................................... A-17
Figure A-5. ASYNC/AUPC Block Diagram ........................................................................................................ A-20
Figure A-6. Remote ASYNC Connection Diagram for Y Cable .......................................................................... A-29
Figure A-7. Remote ASYNC Connection Diagram for Breakout Panel ............................................................... A-29
Figure A-8. Sequential Decoder Block Diagram .................................................................................................. A-41
Figure A-9. Viterbi Decoder Block Diagram........................................................................................................ A-43
Figure A-10. IDR Interface Block Diagram.......................................................................................................... A-48
Figure A-11. IBS Interface Block Diagram .......................................................................................................... A-52
Figure A-12. Transmit Section of the Asymmetrical Loop Timing Block Diagram............................................. A-56
Figure A-13. Receive Section of the Asymmetrical Loop Timing Block Diagram .............................................. A-57
Figure A-14. Reed-Solomon PCB (AS/5304-1) ................................................................................................... A-60
Figure A-15. Reed-Solomon Codec Block Diagram............................................................................................. A-61
Figure A-16. Reed-Solomon Encoder Section Block Diagram............................................................................. A-62
Figure A-17. Reed-Solomon Code Page Format................................................................................................... A-64
Figure A-18. Reed-Solomon Decoder Section Block Diagram ............................................................................ A-65
Figure A-19. Reed-Solomon Codec Installation ................................................................................................... A-68
Figure A-20. Overhead Interface PCB Installation ............................................................................................... A-71
Figure A-21. Main Board Field-Changeable Chips .............................................................................................. A-72
Figure A-22. Overhead Board Field-Changeable Chips ....................................................................................... A-73
Figure A-23. 8-Channel Multiplexer PCB (AS/5985) .......................................................................................... A-74
Figure A-24. 8-Channel Multiplexer Installation.................................................................................................. A-76
Figure A-25. Flex Mux (AS/6450)........................................................................................................................ A-80
Figure A-26. Flex Mux Multiplexer Installation................................................................................................... A-84
Figure C-1. Viterbi BER Performance Curves.......................................................................................................C-20
Figure C-2. Viterbi with Reed-Solomon BER Performance Curves......................................................................C-22
Figure C-4. Sequential BER Performance Curves (56 kbit/s)................................................................................C-26
Figure C-5. Sequential Decoder BER Performance Curves (1544 kbit/s) .............................................................C-28
Figure C-6. Sequential BER Curves at 1544 kbit/s and Reed-Solomon ................................................................C-30
Figure C-7. 8PSK BER Specification Curves (1544 kbit/s)...................................................................................C-32
Rev. 4
xi

Advertisement

Table of Contents
loading

Table of Contents