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Specifications
C.11
Intermediate Data Rate
C.11.1
IDR (Optional with Overhead Card)
Refer Table C-19 for IDR specifications.
G.703
ESC Audio
Audio Encoding
Audio Interface Type
Audio Input Level
Audio Output Level
Audio Filtering
ESC Data Interface Type
ESC Data Rate
ESC Data Circuits Supported
Data Signal Phasing
Octet Timing
Backward Alarms Supported
Backward Alarm Inputs
Backward Alarm Outputs
Demodulator Fault Relay
Deferred Maintenance Alarm
C.11.2
IDR Primary Data Interfaces
When configured for IDR operation, the board performs these functions:
•
•
C–52
Table C-19. IDR Specifications
Primary Data Rates Supported
1544 kbit/s SD, RD
2048 kbit/s SD, RD
Engineering Service Channel
2 duplex ADPCM channels
CCITT G.721
600Ω transformer-balanced 4-wire
-20 to +10 dBm for 0 dBm, 1 dB steps
-20 to +10 dBm for 0 dBm, 1 dB steps
Internal 300 to 3400 Hz input and output
EIA-422
8 kbit/s, also 64 kbit/s if ADPCM audio is not used
SD, ST, RD, RT, Octet in, Octet out
Per EIA-449, data changes on the rising clock transition, is sampled
on the falling clock edge
Octet high in with every 8th bit, aligns with frame bit d8
Faults and Alarms
4 input, 4 output
1KΩ pull up to +5V, set below 2V to clear
FORM C Relay, NO, NC, C
NO, C contacts available for backward alarm inputs
Open collector, high impedance if faulted, 15V maximum, 20 mA
maximum
Receives and performs clock and data recovery on incoming G.703 T1 and E1
pseudo-ternary data.
Clock dejitter is performed per G.823 and G.824, and any data decoding (AMI,
B8Z5, or HDB3) required per G.703 is also accomplished.
SDM-300A Satellite Modem
Rev. 4
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