Options
M C
ST
TT
TXD
Clock Selection
TX TERR (TT)
INT (SCT)
SCT (INT)
SCT (LOOP)
INT (LOOP)
(See Note 1)
EXT CLOCK
Notes:
1. When CONFIGURATION INTERFACE → LOOP TIMING is set to ON,
SCT(INT) will change to read: SCT(LOOP).
2. When CONFIGURATION MOD → MOD REF is set to EXT MOD, S3 will
switch to the EXT REF position.
Figure A-12. Transmit Section of the Asymmetrical Loop Timing Block Diagram
A–56
S1
S4
S1 set to:
S2 set to:
DDS
DDS
DDS
DDS
RXC
PLL
MC
PLL
SDM-300A Satellite Modem
PLL
S2
D DS
O U TPU T
S3 set to:
S4 set to:
INT
INT
EXT REF
(See Note 2)
EXT REF
(See Note 2)
R XC
IN T
S3
EXT
R EF
TXC
TXD
TT
ST
ST
ST
ST
ST
Rev. 4