Figure A-12. Transmit Section Of The Asymmetrical Loop Timing Block Diagram - Comtech EF Data SLM-3650 Installation And Operation Manual

Satellite modem
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SLM-3650 Satellite Modem
Options
MC
ST
TT
TXD
Clock Selection
TX TERR (TT)
INT (SCT)
SCT (INT)
SCT (LOOP)
INT (LOOP)
(See Note 1)
EXT CLOCK
Notes:
1. When CONFIGURATION INTERFACE → LOOP TIMING is set to ON,
SCT(INT) will change to read: SCT(LOOP).
2. When CONFIGURATION MOD → MOD REF is set to EXT MOD, S3 will
switch to the EXT REF position.

Figure A-12. Transmit Section of the Asymmetrical Loop Timing Block Diagram

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S1
S4
S1 set to:
S2 set to:
DDS
INT
DDS
INT
DDS
EXT REF (See Note 2)
DDS
EXT REF (See Note 2)
RXC
PLL
MC
PLL
A–57
PLL
S2
S3
DDS
OUTPUT
S3 set to:
S4 set to:
TT
ST
ST
ST
ST
ST
Revision 3
MN/SLM3650.IOM
RXC
INT
EXT
REF
TXC
TXD

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