Figure 11-1. Transmit Section Of The Asymmetrical Loop Timing Block Diagram - Comtech EF Data SNM-1001L Installation And Operation Manual

SNM-1001L Satellite Modem
Asymmetrical Loop Timing
The transmit data is normally clocked into the modem with the Terminal Timing (TT)
clock in typical EIA-422 operation. The received data is clocked out with the Receive
Timing (RT) clock. The asymmetrical loop timing option allows the transmit and receive
data to be clocked with the same, or a multiple of the same clock. The added benefit is
that the transmit and receive data rates do not have to be the same.
MC
ST
TT
TXD
Clock Selection
TX TERR (TT)
INT (SCT)
SCT (INT)
SCT (LOOP)
INT (LOOP)
(See Note 1)
EXT CLOCK
Notes:
1. When CONFIGURATION INTERFACE → LOOP TIMING is set to ON, SCT
(INT) will change to read: SCT (LOOP).
2. When CONFIGURATION MOD → MOD REF is set to EXT MOD, S3 will
switch to the EXT REF position.

Figure 11-1. Transmit Section of the Asymmetrical Loop Timing Block Diagram

S1
S4
S1 set to: S2 set to:
DDS
DDS
DDS
DDS
RXC PLL
MC PLL
11–2
PLL
S2
DDS
S3 set to:
INT
INT
EXT REF (See Note 2)
EXT REF (See Note 2)
Revision 1
MN/SNM1001L.IOM
RXC
INT
S3
EXT
REF
OUTPUT
TXC
TXD
S4 set to:
TT
ST
ST
ST
ST
ST