CHAPTER 3
This chapter provides basic information required to understand the functions of the FR
family. It covers architecture, specifications, and instructions.
3.1 Memory Space
3.2 Internal Architecture
3.3 Instruction Cache
3.4 Dedicated Registers
3.5 General-Purpose Registers
3.6 Data Structure
3.7 Word Alignment
3.8 Memory Map
3.9 Branch Instructions
3.10 EIT (Exception, Interrupt, and Trap)
3.11 Reset (Device Initialization)
3.12 Clock Generation Control
3.13 Device State Control
3.14 Operating Modes
CPU AND CONTROL UNITS
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