Common Specifications Other Than Duplex Specifications - Omron CS1D DUPLEX SYSTEM - 10-2009 Operation Manual

Specifications
Item
Restrictions The CS1D CPU Units for Duplex CPU Systems do not support any interrupt
on interrupts functions.
(Duplex CPU Power OFF interrupt tasks, scheduled interrupt tasks, I/O interrupt tasks, and
Systems only) external interrupt tasks cannot be used in either Duplex or Simplex Mode. Inter-
rupt control instructions (MSKS, MSKR, and CLI) are executed as NOPs.
Restrictions No restrictions.
on I/O refresh
methods
(Duplex CPU
Systems only)
Cannot be used in
Duplex CPU Sys-
tems (disabled).
Restrictions Only Normal Mode can be used in Duplex CPU Systems. Parallel Processing
on CPU pro- Mode and Peripheral Servicing Priority Mode cannot be used.
cessing
modes
(Duplex CPU
Systems only)
Restrictions Background execution of text string instructions, table data instructions, and data
on back- shift instructions cannot be used in Duplex CPU Systems.
ground exe-
cution
(Duplex CPU
Systems only)
Accuracy of
(10 ms + cycle time)
timer instruc-
If a timer instruction is being executed when operation is switched from duplex to
tions in
simplex, the error in the timer in the first cycle after switching may exceed the
Duplex CPU
normal time. In this case, the timer accuracy will be as follows:
Systems
TIM, TIMX, TIMH(015), TIMHX(
TIMLX(553), MTIM(543), MTIMX(
TMHWX(817):
TMHH(540), TMHHX(552):
PV refresh-
TIM, TIMX, TIMH(015), TIMHX(
ing in Duplex
TTIMX(555):
CPU Sys-
The timer PV is not refreshed when the timer instruction is jumped for JMP,
tems during
CJMP, or CJPN-JME. The PV will be refreshed for the entire period it was
timer instruc-
jumped the next time it is executed (i.e., the next time it is not jumped). (With
tions in
CS1-H CPU Units, the PV for these timers were refreshed even when jumped.)
jumped pro-
TIMW(813), TIMWX(816), TMHW(815), TMHWX(817):
gram sec-
tions or in
When the input condition for BPRG is OFF, or when the block program is tempo-
stopped block
rarily stopped by BPPS, the timer PV is not refreshed. (With the CS1-H CPU
program sec-
Units, the PV for these timers were refreshed each cycle.)
tion (Differ-
ences from
CS1-H.)
Clock function Synchronized with active CPU Unit.
in Duplex
CPU Systems
2-1-3

Common Specifications other than Duplex Specifications

Item
Control method
I/O control method
Programming
22
Specifications
Cyclic refreshing
Refreshing by I/O refresh instruction (IORF(097))
Refreshing by CPU Bus Unit immediate refresh instruction
(DLINK(226))
Immediate refresh option "!"
Immediate refresh option "!" will be not be used even if it is
specified.
551
), TTIM(087), TTIMX(555), TIML(542),
554
), TIMW(813), TIMWX(816), TMHW(815),
(10 ms + cycle time 10 ms or less
(10 ms + cycle time)
551
), TMHH(540), TMHHX(552), TTIM(087),
Specifications
Stored program
Cyclic scan and immediate processing (by IORF only)
are both supported.
Ladder diagram
20 ms or less
---
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Section 2-1
Reference
3-1-7 Duplex CPU Sys-
tem Restrictions
Appendix E Precau-
tions in Replacing CS1-
H PLCs with CS1D
PLCs
3-1-7 Duplex CPU Sys-
tem Restrictions
Appendix E Precau-
tions in Replacing CS1-
H PLCs with CS1D
PLCs
Reference