Data Movement Instructions - Omron CS1D DUPLEX SYSTEM - 10-2009 Operation Manual

Cs1d duplex system
Table of Contents

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Instruction Execution Times and Number of Steps
Instruction
Mnemonic
Time Compari-
LD, AND, OR+=DT
son Instructions
LD, AND, OR+<>DT 342
LD, AND, OR+<DT
LD, AND, OR+<=DT 344
LD, AND, OR+>DT
LD, AND, OR+>=DT 346
COMPARE
CMP
!CMP
DOUBLE COM-
CMPL
PARE
SIGNED
CPS
BINARY COM-
!CPS
PARE
DOUBLE
CPSL
SIGNED
BINARY COM-
PARE
TABLE COM-
TCMP
PARE
MULTIPLE
MCMP
COMPARE
UNSIGNED
BCMP
BLOCK COM-
PARE
EXPANDED
BCMP2
BLOCK COM-
PARE
AREA RANGE
ZCP
COMPARE
DOUBLE AREA
ZCPL
RANGE COM-
PARE
Note
9-5-6

Data Movement Instructions

Instruction
Mnemonic
MOVE
MOV
!MOV
DOUBLE
MOVL
MOVE
MOVE NOT
MVN
364
Code
Length
(steps)
341
4
343
345
020
3
020
7
060
3
114
3
114
7
115
3
085
4
019
4
068
4
502
4
088
3
116
3
1. When a double-length operand is used, add 1 to the value shown in the
length column in the following table.
2. Not supported by Duplex CPU Systems.
Code
Length
(steps)
021
3
021
7
498
3
022
3
Execution time ( s)
CPU6@H
CPU6@S
(Duplex
(Single
CPU)
CPU)
(See note
25.1
2.)
25.2
25.2
25.2
25.1
25.2
0.04
0.04
(See note
+42.1
2.)
0.08
0.08
0.08
0.08
(See note
+35.9
2.)
0.08
0.08
14.0
14.0
20.5
20.5
21.5
21.5
(See note
8.4
2.)
313.0
5.3
5.3
5.5
5.5
Execution time ( s)
CPU6@H
CPU6@S
(Duplex
(Single
CPU)
CPU)
0.18
0.18
(See note
+21.38
2.)
0.32
0.32
0.18
0.18
Section 9-5
Conditions
CPU4@S
(Single
CPU)
36.4
Execution times
are the same for
both ON execu-
tion and OFF
execution.
0.04
---
+42.1
---
0.08
---
0.08
---
+35.9
---
0.08
---
15.2
---
22.8
---
23.7
---
9.3
Number of data
words: 1
345.3
Number of data
words: 255
5.4
---
6.7
---
Conditions
CPU4@S
(Single
CPU)
0.20
---
+21.40
---
0.34
---
0.20
---

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