Pin Status During Internal Rom, Internal Ram, And Peripheral I/O Access - NEC V850E/MA1 User Manual

4.2.1 Pin status during internal ROM, internal RAM, and peripheral I/O access

While accessing internal ROM and RAM, the address bus becomes undefined, and the data bus control signals are
not output and enter the high-impedance state. The external bus control signals become inactive.
While accessing peripheral I/O, the address bus outputs the address data of the on-chip peripheral I/O currently
being accessed, and the data bus control signals are not output and enter the high-impedance state. The external
bus control signals become inactive.
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CHAPTER 4 BUS CONTROL FUNCTION
User's Manual U14359EJ4V0UM