NEC V850E/MA1 User Manual page 565

32-bit single-chip microcontroller
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Port 5 ..................................................................... 481
Port 5 mode control register................................... 482
Port 5 mode register .............................................. 481
Port 7 ..................................................................... 483
Port AH .................................................................. 486
Port AH mode control register................................ 487
Port AH mode register ........................................... 487
Port AL................................................................... 484
Port AL mode control register ................................ 485
Port AL mode register ............................................ 484
Port BD .................................................................. 502
Port BD mode control register................................ 503
Port BD mode register ........................................... 502
Port CD .................................................................. 499
Port CD function control register............................ 501
Port CD mode control register ............................... 500
Port CD mode register ........................................... 499
Port CM.................................................................. 496
Port CM function control register ........................... 498
Port CM mode control register ............................... 497
Port CM mode register........................................... 496
Port configuration................................................... 449
Port CS .................................................................. 490
Port CS function control register ............................ 493
Port CS mode control register................................ 492
Port CS mode register ........................................... 491
Port CT .................................................................. 494
Port CT mode control register................................ 495
Port CT mode register............................................ 494
Port DL................................................................... 488
Port DL mode control register ................................ 489
Port DL mode register............................................ 488
Power-save control ................................................ 307
Power-save control register ................................... 310
Power-save mode register ..................................... 309
PRC ....................................................................... 154
PRCMD.................................................................. 309
Prescaler unit......................................................... 299
Priorities of maskable interrupts............................. 275
Program register set ................................................ 67
Program space ...................................................... 140
Programmable wait function .................................. 119
PRS ....................................................................... 299
PSC ....................................................................... 310
PSMR .................................................................... 309
PWM buffer registers 0, 1 ...................................... 444
PWM control registers 0, 1..................................... 442
PWM unit ............................................................... 441
APPENDIX C INDEX
PWM0.......................................................................47
PWM1.......................................................................48
PWMB0, PWMB1 ...................................................444
PWMC0, PWMC1...................................................442
[Q]
Quantization error...................................................438
[R]
RAS1, RAS3, RAS4, RAS6 ......................................57
RD ............................................................................56
Receive buffer registers 0 to 2................................367
Receive-only serial I/O shift registers 0 to 2 ...........397
Recommended use of address space ......................83
Refresh control function (EDO DRAM) ...................170
Refresh control function (SDRAM) .........................196
Refresh control registers 1, 3, 4, 6 .........................170
Refresh wait control register...................................172
REFRQ.....................................................................54
Relationship between programmable wait and
external wait ...........................................................124
Repetition frequency ..............................................447
RESET .....................................................................60
Reset functions.......................................................504
Resolution ..............................................................437
RFS1, RFS3, RFS4, RFS6.............................170, 196
ROMC ....................................................................150
RWC.......................................................................172
RXB0 to RXB2........................................................367
RXD0, RXD1 ............................................................51
RXD2........................................................................50
[S]
Sampling time.........................................................440
SCK0, SCK1.............................................................51
SCK2 ........................................................................50
SCR1, SCR3, SCR4, SCR6 ...........................162, 180
SDCAS .....................................................................58
SDCKE .....................................................................58
SDCLK .....................................................................58
SDRAM access ......................................................182
SDRAM configuration registers 1, 3, 4, 6 ...............180
SDRAM connection ................................................177
SDRAM initialization sequence ..............................203
SDRAM refresh control registers 1, 3, 4, 6 .............196
SDRAS .....................................................................58
Securing oscillation stabilization time .....................320
SEIC0 to SEIC2......................................................281
User's Manual U14359EJ4V0UM
565

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