NEC V850E/MA1 User Manual page 157

(c) When read (address setup wait, idle state insertion)
CLKOUT (output)
A0 to A25 (output)
BCYST (output)
CSn/RASm (output)
RD (output)
OE (output)
WE (output)
UWR/UCAS (output)
LWR/LCAS (output)
IORD (output)
IOWR (output)
D0 to D7 (I/O)
D0 to D15 (I/O)
WAIT (input)
Remarks 1. The circle
2. The broken lines indicate the high-impedance state.
3. n = 0 to 7, m = 1, 3, 4, 6
CHAPTER 5 MEMORY ACCESS CONTROL FUNCTION
Figure 5-5. Page ROM Access Timing (3/4)
(halfword/word access with 8-bit bus width or word
access with 16-bit bus width)
TASW T1 T2
Off-page address
Data
indicates the sampling timing.
User's Manual U14359EJ4V0UM
TASW TO1 TO2
On-page address
Data
TI
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