NEC V850E/MA1 User Manual page 433

32-bit single-chip microcontroller
Hide thumbs Also See for V850E/MA1:
Table of Contents

Advertisement

12.7.2 Scan mode operation (external trigger scan)
In this mode, the analog inputs specified by the ADM0 register are selected sequentially from the ANI0 pin using
the ADTRG signal as a trigger, and A/D converted. The A/D conversion results are stored in the ADCRn register
corresponding to the analog input (n = 0 to 7).
When the lower 4 channels (ANI0 to ANI3) of the analog input are set by the ADM0 register so that they are
scanned, the A/D conversion end interrupt (INTAD) is generated when the number of A/D conversions specified have
ended, and A/D conversion is stopped.
When the higher 4 channels (ANI4 to ANI7) of the analog input are set by the ADM0 register so that they are
scanned, after the conversion of the lower 4 channels is ended, the mode is shifted to the A/D trigger mode, and the
remaining A/D conversions are executed. The conversion results are stored in the ADCRn register corresponding to
the analog input (n = 0 to 7).
Trigger
ADTRG signal
ADTRG signal
ADTRG signal
ADTRG signal
(A/D trigger mode)
When the conversion of all the specified analog inputs has ended, the INTAD interrupt is generated and A/D
conversion is stopped.
When a trigger is input to the ADTRG pin while the ADCE bit of the ADM0 register is 1, A/D conversion is started
again.
This is most appropriate for applications in which multiple analog inputs are constantly monitored.
CHAPTER 12
Analog Input
A/D Conversion Result Register
ANI0
ADCR0
ANI1
ADCR1
ANI2
ADCR2
ANI3
ADCR3
ANI4
ADCR4
ANI5
ADCR5
ANI6
ADCR6
ANI7
ADCR7
User's Manual U14359EJ4V0UM
A/D CONVERTER
433

Advertisement

Table of Contents
loading

Table of Contents