NEC V850E/MA1 User Manual page 561

32-bit single-chip microcontroller
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[A]
A/D conversion result registers 0 to 7 .................... 411
A/D conversion result registers 0H to 7H ............... 411
A/D converter mode register 0 ............................... 407
A/D converter mode register 1 ............................... 409
A/D converter mode register 2 ............................... 410
A/D converter operation ......................................... 413
A0 to A15 ................................................................. 59
A16 to A25 ............................................................... 59
ADCR0 to ADCR7.................................................. 411
ADCR0H to ADCR7H ............................................ 411
Address multiplex function (EDO DRAM) .............. 161
Address multiplex function (SDRAM)..................... 178
Address setup wait control register ........................ 121
Address space ......................................................... 72
ADIC ...................................................................... 281
ADM0..................................................................... 407
ADM1..................................................................... 409
ADM2..................................................................... 410
ADTRG .................................................................... 50
ANI0 to ANI7............................................................ 52
Applications ............................................................. 30
Area ......................................................................... 77
ASC ....................................................................... 121
ASIF0 to ASIF2...................................................... 366
ASIM0 to ASIM2 .................................................... 362
ASIS0 to ASIS2 ..................................................... 365
Asynchronous serial interface mode
registers 0 to 2 ....................................................... 362
Asynchronous serial interface status
registers 0 to 2 ....................................................... 365
Asynchronous serial interface transmission status
registers 0 to 2 ....................................................... 366
Asynchronous serial interfaces 0 to 2 .................... 359
AV
......................................................................... 61
DD
AV
....................................................................... 61
REF
AV
......................................................................... 61
SS
[B]
Basic configuration of timer C ................................ 324
Basic configuration of timer D ................................ 349
Baud rate generator control registers 0 to 2........... 384
BCC ....................................................................... 126
BCP ....................................................................... 122
APPENDIX C INDEX
BCT0, BCT1 ...........................................................102
BCYST .....................................................................56
BEC ........................................................................105
Block transfer mode ...............................................227
Boundary operation conditions ...............................140
BRG0 to BRG2.......................................................382
BRGC0 to BRGC2..................................................384
BSC ........................................................................104
Bus access .............................................................103
Bus control pins........................................................95
Bus cycle control register .......................................126
Bus cycle period control register ............................122
Bus cycle type configuration registers 0, 1 .............102
Bus cycle type control function ...............................101
Bus cycles in which wait function is valid................125
Bus hold function....................................................127
Bus hold procedure ................................................128
Bus hold timing (EDO DRAM) ................................131
Bus hold timing (SDRAM).......................................135
Bus hold timing (SRAM) .........................................129
Bus priority order ....................................................139
Bus size configuration register ...............................104
Bus sizing function .................................................104
Bus width................................................................108
BUSCLK ...................................................................54
[C]
Capture/compare registers C00, 01, 10, 11............327
Capture/compare registers C20, 21 .......................327
Capture/compare registers C30, 31 .......................327
Cautions (A/C converter) ........................................435
Cautions (DMA)......................................................263
Cautions (PWM) .....................................................447
Cautions (timer C) ..................................................348
Cautions (timer D) ..................................................357
Cautions (UART) ....................................................389
CCC00, 01, 10, 11..................................................327
CCC20, 21..............................................................327
CCC30, 31..............................................................327
Chip area selection control registers 0, 1 .................98
Chip select control function ......................................98
CKC........................................................................303
CKSEL......................................................................60
CKSR0 to CKSR2 ..................................................383
CLKOUT...................................................................53
User's Manual U14359EJ4V0UM
561

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