ST72361xx-Auto
Figure 94. ADC block diagram
AIN0
AIN1
AINx
17.3.2
A/D conversion
The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the
Chapter 8: I/O
to be read as a logic input.
In the ADCCSR register:
●
Select the CS[3:0] bits to assign the analog channel to convert.
ADC conversion mode:
In the ADCCSR register:
●
Set the ADON bit to enable the A/D converter and to start the conversion. From this
time on, the ADC performs a continuous conversion of the selected channel.
When a conversion is complete:
●
The EOC bit is set by hardware.
●
The result is in the ADCDR registers.
A read to the ADCDRH resets the EOC bit.
To read the 10 bits, perform the following steps:
1.
Poll EOC bit
2.
Read the ADCDRL register
3.
Read the ADCDRH register. This clears EOC automatically.
To read only 8 bits, perform the following steps:
1.
Poll EOC bit
2.
Read the ADCDRH register. This clears EOC automatically.
f
CPU
f
f
CPU,
CPU
EOC SPEED ADON SLOW
4
ANALOG
MUX
ADCDRH
ports. Using these pins as analog inputs does not affect the ability of the port
Doc ID 12468 Rev 3
f
ADC
/2
f
/4
,
CPU
CH3
CH2
CH1
CH0
D9
D8
D7
D6
ADCDRL
0
10-bit A/D converter (ADC)
ADCCSR
ANALOG TO DIGITAL
CONVERTER
D5
D4
D3
D2
0
0
0
0
0
D1
D0
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