Central processing unit
4
Central processing unit
4.1
Introduction
This CPU has a full 8-bit architecture and contains six internal registers allowing efficient
8-bit data manipulation.
4.2
Main features
●
Enable executing 63 basic instructions
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Fast 8-bit by 8-bit multiply
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17 main addressing modes (with indirect addressing mode)
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Two 8-bit index registers
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16-bit stack pointer
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Low power HALT and WAIT modes
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Priority maskable hardware interrupts
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Non-maskable software/hardware interrupts
4.3
CPU registers
The six CPU registers shown in
accessed by specific instructions.
4.3.1
Accumulator (A)
The Accumulator is an 8-bit general purpose register used to hold operands and the results
of the arithmetic and logic calculations and to manipulate data.
4.3.2
Index registers (X and Y)
These 8-bit registers are used to create effective addresses or as temporary storage areas
for data manipulation. (The Cross-Assembler generates a precede instruction (PRE) to
indicate that the following instruction refers to the Y register.)
The Y register is not affected by the interrupt automatic procedures.
4.3.3
Program counter (PC)
The program counter is a 16-bit register containing the address of the next instruction to be
executed by the CPU. It is made of two 8-bit registers PCL (Program Counter Low which is
the LSB) and PCH (Program Counter High which is the MSB).
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Figure 8
are not present in the memory mapping and are
Doc ID 12468 Rev 3
ST72361xx-Auto
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