STMicroelectronics ST72361 Auto Series Manual page 29

ST72361xx-Auto
Table 4. Hardware register map (continued)
Address Block
0048h
0049h
004Ah
LINSCI1
004Bh
(LIN
004Ch
Master/Slave)
004Dh
004Eh
004Fh
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
16-BIT
0058h
TIMER
0059h
005Ah
005Bh
005Ch
005Dh
005Eh
005Fh
0060h
0061h
0062h
LINSCI2
0063h
0064h
(LIN Master)
0065h
0066h
0067h
0068h
to
007Fh
1. x = undefined, R/W = read/write
2. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the
I/O pins are returned instead of the DR register contents.
3. The bits associated with unavailable pins must always keep their reset value.
Register
label
SCI1ISR SCI1 Status Register
SCI1DR SCI1 Data Register
SCI1BRR SCI1 Baud Rate Register
SCI1CR1 SCI1 Control Register 1
SCI1CR2 SCI1 Control Register 2
SCI1CR3 SCI1Control Register 3
SCI1ERPR SCI1 Extended Receive Prescaler Register
SCI1ETPR SCI1 Extended Transmit Prescaler Register
Reserved Area (1 byte)
T16CR2 Timer Control Register 2
T16CR1 Timer Control Register 1
T16CSR Timer Control/Status Register
T16IC1HR Timer Input Capture 1 High Register
T16IC1LR Timer Input Capture 1 Low Register
T16OC1HR Timer Output Compare 1 High Register
T16OC1LR Timer Output Compare 1 Low Register
T16CHR Timer Counter High Register
T16CLR Timer Counter Low Register
T16ACHR Timer Alternate Counter High Register
T16ACLR Timer Alternate Counter Low Register
T16IC2HR Timer Input Capture 2 High Register
T16IC2LR Timer Input Capture 2 Low Register
T16OC2HR Timer Output Compare 2 High Register
T16OC2LR Timer Output Compare 2 Low Register
SCI2SR SCI2 Status Register
SCI2DR SCI2 Data Register
SCI2BRR SCI2 Baud Rate Register
SCI2CR1 SCI2 Control Register 1
SCI2CR2 SCI2 Control Register 2
SCI2CR3 SCI2 Control Register 3
SCI2ERPR SCI2 Extended Receive Prescaler Register
SCI2ETPR SCI2 Extended Transmit Prescaler Register
Reserved area (24 bytes)
Doc ID 12468 Rev 3
Register name
Register and memory map
Reset
Remarks
status
C0h Read Only
xxh R/W
00h R/W
xxh R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
00h R/W
xxh Read Only
xxh Read Only
80h R/W
00h R/W
FFh Read Only
FCh Read Only
FFh Read Only
FCh Read Only
xxh Read Only
xxh Read Only
80h R/W
00h R/W
C0h Read Only
xxh R/W
00h R/W
xxh R/W
00h R/W
00h R/W
00h R/W
00h R/W
(1)
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