Data Register (Adcdrh); Data Register (Adcdrl); Table 85. Adc Register Map And Reset Values - STMicroelectronics ST72361 Auto Series Manual

10-bit A/D converter (ADC)
Table 84.
1. The number of channels is device dependent. Refer to the device pinout description.
17.6.2

Data register (ADCDRH)

Read only
Reset value: 0000 0000 (00h)
7
D9
Bits 7:0 = D[9:2] MSB of Analog Converted Value
17.6.3

Data register (ADCDRL)

Read only
0000 0000 (00h)
7
0
Bits 7:2 = Reserved. Forced by hardware to 0.
Bits 1:0 = D[1:0] LSB of Analog Converted Value
Table 85.
Address
(Hex.)
45h
46h
47h
218/279
ADC channel selection (continued)
(1)
Channel pin
AIN8
AIN9
AIN10
AIN11
AIN12
AIN13
AIN14
AIN15
D8 D7
0 0
ADC register map and reset values
Register
7
label
ADCCSR EOC SPEED
Reset value 0
ADCDRH D9
Reset value 0
ADCDRL 0
Reset value 0
Doc ID 12468 Rev 3
CH3
1
D6 D5
0 0
6 5 4
ADON SLOW
0 0 0
D8 D7 D6
0 0 0
0 0 0
0 0 0
ST72361xx-Auto
CH2 CH1
0
0
1
0
1
1
D4 D3
0 D1
3 2 1
CH3 CH2 CH1
0 0 0
D5 D4 D3
0 0 0
0 0 D1
0 0 0
CH0
0
1
0
1
0
1
0
1
0
D2
0
D0
0
CH0
0
D2
0
D0
0