Error Due To Lin Synch Measurement; Error Due To Baud Rate Quantization; Impact Of Clock Deviation On Maximum Baud Rate - STMicroelectronics ST72361 Auto Series Manual

ST72361xx-Auto
15.9.9

Error due to LIN synch measurement

The LIN synch field is measured over eight bit times.
This measurement is performed using a counter clocked by the CPU clock. The edge
detections are performed using the CPU clock cycle.
This leads to a precision of 2 CPU clock cycles for the measurement which lasts 16*8*LDIV
clock cycles.
Consequently, this error (D
2 / (128*LDIV
LDIV
MIN
rate, taking into account the maximum deviation of +/-15%.
15.9.10

Error due to baud rate quantization

The baud rate can be adjusted in steps of 1 / (16 * LDIV). The worst case occurs when the
"real" baud rate is in the middle of the step.
This leads to a quantization error (D
15.9.11

Impact of clock deviation on maximum baud rate

The choice of the nominal baud rate (LDIV
(D
QUANT
Consequently, at a given CPU frequency, the maximum possible nominal baud rate
(LPR ) should be chosen with respect to the maximum tolerated deviation given by the
MIN
equation:
D + 2 / (128 * LDIV
TRA
Example:
A nominal baud rate of 20Kbits/s at T
LDIV
MIN
D = 2 / (128 * LDIV
MEAS
D
QUANT
LIN slave systems
For LIN slave systems (the LINE and LSLV bits are set), receivers wake up by LIN synch
break or LIN Identifier detection (depending on the LHDM bit).
Hot plugging feature for LIN slave nodes
In LIN slave mute mode (the LINE, LSLV and RWU bits are set) it is possible to hot plug to a
network during an ongoing communication flow. In this case the SCI monitors the bus on the
RDI line until 11 consecutive dominant bits have been detected and discards all the other
bits received.
MEAS
).
MIN
corresponds to the minimum LIN prescaler content, leading to the maximum baud
) and the measurement error (D
) + 1 / (2 *16 * LDIV
MIN
= 25 - 0.15*25 = 21.25
) * 100 = 0.00073%
MIN
= 1 / (2 * 16 * LDIV
MIN
LINSCI serial communication interface (LIN master/slave)
) is equal to:
) equal to 1 / (2*16*LDIV
QUANT
) will influence both the quantization error
NOM
). The worst case occurs for LDIV
MEAS
) + D
MIN
= 125ns (8 MHz) leads to LDIV
CPU
) * 100 = 0.0015%
Doc ID 12468 Rev 3
).
MIN
+ D < 3.75%
REC TCL
NOM
.
MIN
= 25d.
183/279