I/O ports
Table 32.
Port
Port D
Port E
Port F
8.5
Low power modes
Table 33.
Mode
WAIT
HALT
8.6
Interrupts
The external interrupt event generates an interrupt if the corresponding configuration is
selected with DDR and OR registers and the interrupt mask in the CC register is not active
(RIM instruction).
Table 34.
External interrupt on selected
external event
78/279
Port configuration (continued)
Pin name
OR = 0
PD0
PD1
PD3:2
PD4
floating
PD5
PD6
PD7
PE7:0
floating (TTL)
PF7:0
floating (TTL)
Effect of low power modes on I/O ports
No effect on I/O ports. External interrupts cause the device to exit from WAIT mode.
No effect on I/O ports. External interrupts cause the device to exit from HALT mode.
I/O port interrupt control/wake-up capability
Interrupt event
Doc ID 12468 Rev 3
Input
OR = 1
pull-up interrupt (ei3)
floating interrupt (ei3)
pull-up
floating interrupt (ei3)
pull-up
pull-up interrupt (ei3)
floating interrupt (ei3)
pull-up (TTL)
pull-up (TTL)
Description
Enable
Event
control
flag
bit
DDRx
-
ORx
ST72361xx-Auto
Output
OR = 0
OR = 1
open drain
push-pull
open drain
push-pull
open drain
push-pull
Exit
Exit
from
from
wait
halt
Yes
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