ST72361xx-Auto
14.8.3
Data I/O register (SPIDR)
Read/ write
Reset value: Undefined
7
D7
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
Note:
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
Warning:
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see
Table 59.
Address
(Hex.)
21
22
23
D6
D5
A write to the SPIDR register places data directly into the
shift register for transmission.
Figure
70).
SPI register map and reset values
Register label
7
SPIDR
MSB
Reset value
x
SPICR
SPIE
Reset value
0
SPICSR
SPIF
Reset value
0
Doc ID 12468 Rev 3
Serial peripheral interface (SPI)
D4
D3
6
5
4
x
x
x
SPE
SPR2
MSTR
0
0
0
WCOL
OVR
MODF
0
0
0
D2
D1
3
2
1
x
x
x
CPOL
CPHA
SPR1
x
x
x
SOD
SSM
0
0
0
0
D0
0
LSB
x
SPR0
x
SSI
0
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