S1D13704 Hardware Configuration - Epson S1D13704 Technical Manual

Embedded memory color lcd controller
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4.2 S1D13704 Hardware Configuration

Signal
CNF0
CNF1
CNF2
CNF3
CNF4
CNF2
0
0
0
0
1
1
1
1
1
1
Interfacing to the PC Card Bus
Issue Date: 01/02/12
The S1D13704 uses CNF4 through CNF0 and BS# to allow selection of the bus mode and
other configuration data on the rising edge of RESET#. Refer to the S1D13704 Hardware
Functional Specification, document number X26A-A-001-xx for details.
The tables below show only those configuration settings important to the PC Card host bus
interface.
Table 4-1: Summary of Power-On/Reset Options
Low
See "Host Bus Selection" table below See "Host Bus Selection" table below
Little Endian
Active low LCDPWR signal
= configuration for PC Card host bus interface
Table 4-2: Host Bus Interface Selection
CNF1
CNF0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
1
= configuration for PC Card host bus interface
High
Big Endian
Active high LCDPWR signal
*
BS#
Host Bus Interface
X
SH-4 bus interface
X
SH-3 bus interface
X
reserved
X
MC68K bus interface #1, 16-bit
X
reserved
X
MC68K bus interface #2, 16-bit
0
reserved
1
reserved
0
Generic #1, 16-bit
1
Generic #2, 16-bit
Page 13
S1D13704
X26A-G-009-03

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