Epson S1D13704 Technical Manual page 75

Epson Research and Development
Vancouver Design Center
REG[17h] Look-Up Table Data Register
Address = FFF7h
n/a n/a
bits 3-0
REG[18h] GPIO Configuration Control Register
Address = FFF8h
n/a n/a
bits 4-0
Note
REG[19h] GPIO Status/Control Register
Address = FFF9h
n/a n/a
bits 4-0
Hardware Functional Specification
Issue Date: 01/02/08
n/a n/a
Look-Up Table Data Bits [3:0]
This register is used to read/write the RGB Look-Up Tables. This register is an aperture
into the three 16-position Look-Up Tables. The Look-Up Table Address Register
(REG[16h]) selects which Look-Up Table position is accessible. See REG[16h] Look-Up
Table Bank Select Register on page 66.
GPIO4 Pin IO
n/a
Configuration
GPIO[4:0] Pin IO Configuration
These bits determine the direction of the GPIO[4:0] pins.
When GPIOn Pin IO Configuration bit = 0, the corresponding GPIOn pin is configured as
an input. The input can be read at the GPIOn Status/Control Register bit. See REG[19h]
below.
When GPIOn Pin IO Configuration bit = 1, the corresponding GPIOn pin is configured as
an output. The output can be controlled by writing the GPIOn Status/Control Register bit.
These bits have no effect when the GPIOn pin is configured for a specific function (i.e.
as FPDAT[11:8] for TFT/D-TFD operation). All unused GPIO pins must be tied to
IO V .
DD
GPIO4 Pin IO
n/a
Status
GPIO[4:0] Status
When the GPIOn pin is configured as an input, the corresponding GPIO Status bit is used
to read the pin input. See REG[18h] above.
When the GPIOn pin is configured as an output, the corresponding GPIO Status bit is used
to control the pin output.
Look-Up Look-Up
Table Data Table Data
Bit 3 Bit 2
GPIO3 Pin IO GPIO2 Pin IO
Configuration Configuration
*
GPIO3 Pin IO GPIO2 Pin IO
Status Status
Page 67
Read/Write
Look-Up Look-Up
Table Data Table Data
Bit 1 Bit 0
Read/Write
GPIO1 Pin IO GPIO0 Pin IO
Configuration Configuration
Read/Write
GPIO1 Pin IO GPIO0 Pin IO
Status Status
S1D13704
X26A-A-001-04