Summary Of Configuration Options; Host Bus Interface Pin Mapping; Table 5-1: Summary Of Power On/Reset Options; Table 5-2: Host Bus Interface Pin Mapping - Epson S1D13704 Technical Manual

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5.3 Summary of Configuration Options

Configuration
Pin
CNF4 Active high (On) LCDPWR polarity
CNF3 Big Endian
Select host bus interface as follows:
CNF[2:0]

5.4 Host Bus Interface Pin Mapping

S1D13704
SH-3
Pin Names
AB[15:1] A[15:1]
AB0 A0
DB[15:0] D[15:0]
WE1# WE1#
CS# CSn#
BCLK CKIO
BS# BS#
RD/WR# RD/WR#
RD# RD#
WE0# WE0#
WAIT# WAIT#
RESET# RESET#
S1D13704
X26A-A-001-04

Table 5-1: Summary of Power On/Reset Options

1
CNF2 CNF1 CNF0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 0
1 1 1
1 1 1

Table 5-2: Host Bus Interface Pin Mapping

SH-4 MC68K #1
A[15:1] A[15:1]
A0 LDS#
D[15:0] D[15:0]
WE1# UDS#
CSn# External Decode External Decode External Decode
CKIO
BS#
RD/WR# R/W#
RD# connect to IO V
WE0# connect to IO V
RDY# DTACK#
RESET# RESET#
Power On/Reset State
Active low (On) LCDPWR polarity
Little Endian
BS# Host Bus
X SH-4 interface
X SH-3 interface
X reserved
X MC68K #1, 16-bit
X reserved
X MC68K #2, 16-bit
0 reserved
1 reserved
0 Generic #1, 16-bit
1 Generic #2, 16-bit
*
MC68K #2
A[15:1]
A0
D[31:16]
DS#
CLK CLK
AS# AS#
R/W#
SIZ1
DD
SIZ0
DD
DSACK1#
RESET#
Epson Research and Development
Vancouver Design Center
0
Generic #1 Generic #2
A[15:1] A[15:1]
A0 A0
D[15:0] D[15:0]
WE1# BHE#
External Decode
BCLK BCLK
connect to V connect to IO V
SS
RD1# connect to IO V
RD0# RD#
WE0# WE#
WAIT# WAIT#
RESET# RESET#
Hardware Functional Specification
Issue Date: 01/02/08
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