Mc68328 To S1D13704 Interface; Hardware Description; Using The Mc68K #1 Host Bus Interface - Epson S1D13704 Technical Manual

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4 MC68328 To S1D13704 Interface

4.1 Hardware Description

4.1.1 Using The MC68K #1 Host Bus Interface

Figure 4-1: Typical Implementation of MC68328 to S1D13704 Interface - MC68K #1
S1D13704
X26A-G-007-03
The interface between the MC68328 and the S1D13704 can be implemented using either
the MC68K #1 or Generic #1 host bus interface of the S1D13704.
The MC68328 multiplexes dual functions on some of its bus control pins (specifically
UDS, LDS, and DTACK). In implementations where all of these pins are available for use
as bus control pins, then the S1D13704 interface is a straightforward implementation of the
"MC68K #1" host bus interface. For further information on this host bus interface, refer to
the S1D13704 Hardware Functional Specification, document number
X26A-A-001-xx.
The following diagram shows a typical implementation of the MC68328 to S1D13704
using the MC68K #1 host bus interface.
MC68328
A[15:0]
D[15:0]
CSB3
DTACK
AS
UDS
LDS
R/W
CLK0
RESET
S1D13704
*
AB[15:1]
DB[15:0]
CS#
Vcc
470
WAIT#
BS#
WE1#
AB0
RD/WR#
RD#
Vcc
BUSCLK
RESET#
Interfacing to the Motorola MC68328 'Dragonball' Microprocessor
Epson Research and Development
Vancouver Design Center
Issue Date: 01/02/12