Single Color 4-Bit Panel Timing; Figure 7-14: Single Color 4-Bit Panel Timing - Epson S1D13704 Technical Manual

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7.3.5 Single Color 4-Bit Panel Timing

FPFRAME
FPLINE
DRDY (MOD)
FPDAT[7:4]
FPLINE
DRDY (MOD)
FPSHIFT
FPDAT7
FPDAT6
FPDAT5
FPDAT4
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
VDP = Vertical Display Period
VNDP = Vertical Non-Display Period
HDP = Horizontal Display Period
HNDP = Horizontal Non-Display Period
Hardware Functional Specification
Issue Date: 01/02/08
VDP
LINE1 LINE2 LINE3 LINE4
1-R1 1-G2 1-B3
1-G1 1-B2 1-R4
1-B1 1-R3 1-G4
1-R2 1-G3 1-B4
*

Figure 7-14: Single Color 4-Bit Panel Timing

= (REG[06h] bits 1-0, REG[05h] bits 7-0) + 1 Lines
= REG[0Ah] bits 5-0 Lines
= ((REG[04h] bits 6-0) + 1) x 8Ts
= (REG[08h] + 4) x 8Ts
VNDP
LINE479 LINE480
HDP
1-B319
1-R320
1-G320
1-B320
Page 41
LINE1 LINE2
HNDP
S1D13704
X26A-A-001-04