Lcd Interface Pin Mapping - Epson S1D13704 Technical Manual

Page 10

3 LCD Interface Pin Mapping

Connector
Pin Name Pin #
BFPDAT0 1
BFPDAT1 3
BFPDAT2 5
BFPDAT3 7
BFPDAT4 9
BFPDAT5 11
BFPDAT6 13
BFPDAT7 15
BFPDAT8 17
BFPDAT9 19
BFPDAT10 21
BFPDAT11 23
BFPSHIFT 33
35
BFPSHIFT2
BFPLINE 37
39
BFPFRAME
2-26
GND (Even
Pins)
N / C 28
VLCD 30
LCDVCC 32
+12V 34
VDDH 36
BDRDY 38
40
BLCDPWR
S1D13704
X26A-G-005-03
Table 3-1: LCD Signal Connector (J5) Pinout
Single Passive Panel
Color
8-bit
4-bit 8-bit Alternate
Format
D0 D0
D1 D1
D2 D2
D3 D3
D0 D4 D4
D1 D5 D5
D2 D6 D6
D3 D7 D7
FPSHIFT FPSHIFT FPSHIFT FPSHIFT FPSHIFT FPSHIFT FPSHIFT FPSHIFT FPSHIFT
FPSHIFT2
FPLINE FPLINE FPLINE
FPFRAME FPFRAME FPFRAME FPFRAME FPFRAME FPFRAME FPFRAME FPFRAME FPFRAME
GND GND GND
LCD panel negative bias voltage (-18V to -23V)
+12V +12V +12V
LCD panel positive bias voltage (+24V to +38V)
MOD MOD
LCDPWR LCDPWR LCDPWR
Dual Passive Panel
Mono Color
4-bit 8-bit 8-bit
D0 LD0
D1 LD1
D2 LD2
D3 LD3
D0 D4 UD0
D1 D5 UD1
D2 D6 UD2
D3 D7 UD3
FPLINE FPLINE FPLINE
*
GND GND GND
+3.3V or +5V (selectable with JP4)
+12V +12V +12V
MOD MOD MOD
LCDPWR LCDPWR LCDPWR
S5U13704B00C Rev. 1.0 ISA Bus Evaluation Board User Manual
Epson Research and Development
Vancouver Design Center
Color TFT/D-TFD
Mono
8-bit 9-bit 12-bit
LD0 R2 R3
LD1 R1 R2
LD2 R0 R1
LD3 G2 G3
UD0 G1 G2
UD1 G0 G1
UD2 B2 B3
UD3 B1 B2
B0 B1
R0
G0
B0
FPLINE FPLINE FPLINE
GND GND GND
+12V +12V +12V
MOD DRDY DRDY
LCDPWR LCDPWR LCDPWR
Issue Date: 01/02/12