S1D13505 Configuration; Hardware Configuration; Performance - Epson S1D13505F00A Technical Manual

1.2 S1D13505 Configuration
Hardware Configuration
The S1D13505 is configured on power-up by latching the power-on state of the DRAM data pins,
MD[15:0]. Refer to the "S1D13505 Hardware Functional Specification" for details.
The "partial" table below shows those configuration settings important in interfacing to the PC Card
bus as shaded.
S1D13505 value on this pin at rising edge of RESET# is used to configure:(1/0)
Pin Name
MD0 8-bit host bus interface
MD[3:1] 111 = PC Card bus interface
MD4 Little Endian
MD5 WAIT# is active high (1 = insert wait state)
MD11 Alternate host bus interface selected
MD12 BUSCLK input divided by two

Performance

The S1D13505 PC Card Interface is specified to support a BCLK of up to 50MHz, and therefore can
provide a high performance display solution.
APPLICATION NOTES (X23A-G-005-05)
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1: INTERFACING THE S1D13505 TO THE PC CARD BUS
Table 1-2 Summary of Power On/Reset Options
1
16-bit host bus interface
Big Endian
WAIT# is active low (0 = insert wait state)
Primary host bus interface selected
BUSCLK input not divided by two
EPSON
0
5-3