Introduction; Features - Epson S1D13704 Technical Manual

Epson Research and Development
Vancouver Design Center

1 Introduction

1.1 Features

S5U13704B00C Rev. 1.0 ISA Bus Evaluation Board User Manual
Issue Date: 01/02/12
This manual describes the setup and operation of the S5U13704B00C Rev. 1.0 Evaluation
Board. Implemented using the S1D13704 Embedded Memory Color LCD Controller, the
S5U13704B00C board is designed for the 16-bit ISA bus environment. To accommodate
other bus architectures, the S5U13704B00C board also provides CPU/Bus interface
connectors.
For more information regarding the S1D13704, refer to the S1D13704 Hardware
Functional Specification, document number X26A-A-001-xx.
• 80-pin QFP14 package.
• SMT technology for all appropriate devices.
• 4/8-bit monochrome and color passive LCD panel support.
• 9/12-bit LCD TFT/D-TFD panel support.
• Selectable 3.3V or 5.0V LCD panel support.
• Oscillator support for CLKI (up to 50MHz with internal clock divide or 25MHz with no
internal clock divide).
• Embedded 40K byte SRAM display buffer for 1/2/4 bit-per-pixel (bpp), 2/4/16 level
gray shade display and 1/2/4/8 bpp, 2/4/16/256 level color display.
• Support for software and hardware power save modes.
• On-board adjustable LCD bias positive power supply (+23V to 40V).
• On-board adjustable LCD bias negative power supply (-14V to -24V).
• 16-bit ISA bus support.
• CPU/Bus interface header strips for non-ISA bus support.
*
Page 7
S1D13704
X26A-G-005-03