Operation; Counter Read; Clock Frequency/Divide Ratio Selection; Synchronous Mode - Intel iSBC 432/100 Hardware Reference Manual

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iSBC 432/100
3.19 OPERATION
The following paragraphs describe operating pro-
cedures
for
counter
reading,
and
for
clock
frequency I divide ratio selection.
3.20 COUNTER READ
Since the gates of all counters are constantly enabled,
the 8253 counters can only be read "on the fly." The
recommended procedure is to use a mode control
word to latch the contents of the count register; this
ensures that the count reading is accurate and stable.
The latched value of the count can then be read.
NOTE
If a counter is read during the down-count, it
is
mandatory
to
complete
the
read
procedure; that is, if two bytes were pr0--
grammed to the counter, then two bytes
must be read before any other operations are
performed with that counter.
To read the count of a particular counter, proceed as
follows:
a.
Write counter register latch control word (figure
3-10) to address X6. This control word specifies
the desired counter and selects the counter
latching operation.
b. Perform a read operation of the desired counter;
refer to table 3-1 for counter addresses.
NOTE
Be sure to read one or two bytes, as specified
in the initialization mode control word. For
two bytes, read in the order specified.
TL
I
I
Loon't Care
Selects Counter Latching
L
Operation
Specifies Counter to be Latched
Figure 3-10. PIT Counter Register
Latch Control Word Format
1?1s20-15
Programming Information
3.21 CLOCK FREQUENCY /DIVIDE
RA TIO SELECTION
To operate the 8251A serial I/O port, counter 2 must
be loaded with a down-count value (N). When count
value N is loaded into a counter, it becomes the clock
divisor. To derive
N for either synchronous or asyn-
chronous RS-232-C operation, use the procedures
described in following paragraphs.
3.22 SYNCHRONOUS MODE
In the synchronous mode, the TXC and/or RXC
rates equal the Baud rate. Therefore, the count value
is determined by:
N=CB
where
N
is the count value,
B is the desired Baud rate, and
C is 1.2288 MHz, the input clock frequency.
Thus, for a 4800 Baud rate, the required count value
(N)
is:
N
=
1.2288 X 10
6
=
256
4800
- ·
If the binary equivalent of count value N
=
256 is
loaded into Counter 2, then the output frequency is
4800 Hz, which is the desired clock rate for syn-
chronous mode operation.
3.23 ASYNCHRONOUS MODE
In the asynchronous mode, the TXC and/or RXC
rates equal the Baud rate times one of the following
multipliers: XI, X16, or X64. Therefore, the count
value is determined by:
N =C/BM
where N is the count value,
B is the desired Baud rate,
M is the Baud rate multiplier (1, 16, or 64),
and
C is 1.2288 MHz, the input clock frequency.
Thus, for a 4800 Baud rate, the required count value
(N)
is:
N
=
1.23 X 10
6
=
16
4800X18
_;
If the binary equivalent of count value N
=
16 is
loaded into Counter 2, then the output frequency is
4800 X 16 Hz, which is the desired clock rate for
3-9

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