Appendix C: Status model
Status Byte register overview
Status Byte register overview
Queue not empty {
Queue not empty {
*
*
*
*
*
Expanded system (TSP-link)
C-4
Figure 98: Status Byte register
Error or
Event queue
•
•
•
Output queue
•
•
•
Measurement Summary Bit (MSB)
System Summary Bit (SSB)
Error Available Bit (EAV)
Questionable Summary Bit (QSB)
Message Available Bit (MAV)
Event Summary Bit (ESB)
Master Summary Status Bit (MSS)
Operation Summary Bit (OSB)
To node X in a system summary
register (system through system 5).
The X refers to the user-assigned
TSP-link node number.
Models 707B and 708B Switching Matrix Reference Manual
Legend
*
Summary bit from the applicable register.
Summary Message Bit: A single bit indicating one or more enabled
+
events occured.
Performs a logical AND of input bits, with the result feeding the
&
Summary Message Bit.
Bit not used (returns a value of 0 when read).
Status
Byte
condition
status.condition
0
1
2
3
4
5
6
7
&
&
&
Service
Request
enable
status.request_enable
0
&
1
&
2
&
3
&
4
&
5
&
7
+
System
Node
enable
status.node_enable
0
&
1
2
&
3
&
4
&
5
&
6
7
+
This register is
available on all
TSP-Link nodes.
707B-901-01 Rev. A / August 2010