Keithley 708B Reference Manual page 427

Section 7: Command reference
The following table contains descriptions of the bits:
Bit Value
B0 status.MEASUREMENT_SUMMARY_BIT
status.MSB
B1
status.SYSTEM_SUMMARY_BIT
status.SSB
B2
status.ERROR_AVAILABLE
status.EAV
B3 status.QUESTIONABLE_SUMMARY_BIT
status.QSB
B4 status.MESSAGE_AVAILABLE
status.MAV
B5
status.EVENT_SUMMARY_BIT
status.ESB
B6
status.RQS
status.MASTER_SUMMARY_STATUS
status.MSS
B7 status.OPERATION_SUMMARY
status.OSB
In addition to the above constants, when more than one bit of the register is set, statusByte will equal the sum
of their decimal weights. For example, if 129 is returned, bits B0 and B7 are set (1 + 128).
Bit
Binary value
Decimal
Weights
7-174
Models 707B and 708B Switching Matrix Reference Manual
B7 B6 B5
0/1 0/1 0/1
128 64 32
7 6 5
(2 ) (2 ) (2 )
Description
Set summary bit indicates that an enabled measurement
event has occurred.
Bit 0 decimal value: 1
Set summary bit indicates that an enabled system
event has occurred.
Bit 1 decimal value: 2
Set summary bit indicates that an error or status
message is present in the Error Queue.
Bit 2 decimal value: 4
Set summary bit indicates that an enabled questionable
event has occurred.
Bit 3 decimal value: 8
Set summary bit indicates that a response message is
present in the Output Queue.
Bit 4 decimal value: 16
Set summary bit indicates that an enabled standard
event has occurred.
Bit 5 decimal value: 32
Request Service (RQS)/Master Summary Status (MSS)
- Depending on how it is used, Bit B6 of the status byte
register is either the Request for Service (RQS) bit or the
Master Summary Status (MSS) bit:
- When using the GPIB or VXI-11 serial poll sequence of
the 707B to obtain the status byte (serial poll byte), B6 is
the RQS bit. Set bit indicates that the Request Service
(RQS) bit of the status byte (serial poll byte) is set and a
serial poll (SRQ) has occurred.
- When using status.condition ICL or the *STB? common
command to read the status byte, B6 is the MSS bit.Set
bit indicates that an enabled summary bit of the status
byte register is set.
Bit 6 decimal value: 64
Set summary bit indicates that an enabled operation
event has occurred.
Bit 7 decimal value: 128
B4 B3 B2
0/1 0/1 0/1
16 8 4
4 3 2
(2 ) (2 ) (2 )
707B-901-01 Rev. A / August 2010
B1 B0
0/1 0/1
2 1
1 0
(2 ) (2 )