32-Khz Oscillators; Oscillator And Clock Registers - Texas Instruments CC253x User Manual

www.ti.com
NOTE: The change from the 16-MHz clock source to the 32-MHz clock source (and vice versa)
aligns with the
when
CLKCONCMD.OSC
change takes effect. The fastest switching is obtained when
000.
NOTE: After coming up from PM1, PM2, or PM3, the CPU must wait for
before operations requiring the system to run on the 32-MHz XOSC (such as the radio) are
started.

4.4.3 32-kHz Oscillators

Two 32-kHz oscillators are present in the device as clock sources for the 32-kHz clock:
• 32-kHz XOSC
• 32-kHz RCOSC
By default, after a reset, the 32-kHz RCOSC is enabled and selected as the 32-kHz clock source. The
RCOSC consumes less power, but is less accurate compared to the 32-kHz XOSC. The chosen 32-kHz
clock source drives the Sleep Timer, generates the tick for the Watchdog Timer, and is used as a strobe in
Timer 2 to calculate the Sleep Timer sleep time. The CLKCONCMD.OSC32K register bit selects the
oscillator to be used as the 32-kHz clock source. This bit does not give an indication of the stability of the
32-kHz XOSC.
The CLKCONCMD.OSC32K register bit can be written at any time, but does not take effect before the 16-
MHz RCOSC is the active system clock source. When system clock is changed from the 16-MHz RCOSC
to the 32-MHz XOSC (CLKCONCMD.OSC from 1 to 0), calibration of the 32-kHz RCOSC starts up and is
performed once if the 32-kHz RCOSC is selected. During calibration, a divided version of the 32-MHz
XOSC is used. The result of the calibration is that the 32-kHz RSOSC is running at 32.753 kHz. The 32-
kHz RCOSC calibration may take up to 2 ms to complete. Calibration can be disabled by setting
SLEEPCMD.OSC32K_CALDIS to 1. At the end of the calibration, an extra pulse may occur on the 32-kHz
clock source, which causes the sleep timer to be incremented by 1.
Note that after having switched to the 32-kHz XOSC and when coming up from PM3 with the 32-kHz
XOSC enabled, the oscillator requires up to 500 ms to stabilize on the correct frequency. The Sleep
Timer, Watchdog Timer and clock-loss detector should not be used before the 32-kHz XOSC is stable.

4.4.4 Oscillator and Clock Registers

This section describes the oscillator and clock registers. All register bits retain their previous values when
entering PM2 or PM3.
SWRU191F – April 2009 – Revised April 2014
Submit Documentation Feedback
setting. A slow
CLKCONCMD.TICKSPD
is changed results in a longer time before the actual source
Copyright © 2009–2014, Texas Instruments Incorporated
Oscillators and Clocks
setting
CLKCONCMD.TICKSPD
CLKCONCMD.TICKSPD
CLKCONSTA.OSC
Power Management and Clocks
equals
to be 0
67