Interrupt And Counter Operation For Received Messages - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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Next, the address byte is read if PRF_PKT_CONF.ADDR_LEN is 1. It is compared against
PRF_ADDR_ENTRYn.ADDRESS for the values of n where the entry is enabled for the received sync word.
If there is a matching entry, this entry is used when receiving the packet; otherwise, reception is stopped
and the device goes back to sync search. If PRF_PKT_CONF.ADDR_LEN is 0, the first entry that is enabled
for the received sync word is used. If PRF_TASK_CONF.MODE is 00, the packet length is then read from
PRF_ADDR_ENTRYn.RXLENGTH. This length includes the address, so it must be greater than or equal to
the number of address bytes. If PRF_TASK_CONF.MODE is 01, the received length byte is compared
against PRF_ADDR_ENTRYn.RXLENGTH. If it is greater than that value, reception is stopped and the
device goes back to sync search.
If reception is stopped due to address mismatch or invalid length, the time-out given by
PRF_SEARCH_TIME or Timer 2 event 2 still applies. If the first packet of the task is being received and
PRF_TASK_CONF.STOP_CONF is 11, the next packet still counts as the first packet.
If a CRC field is present, it is checked using the polynomial configured in the BSP and the initialization
value from PRF_CRC_INIT. The result of the CRC check is written in the MSB of the RES byte in the
status field if a status field is configured. If the CRC is not correct and PRF_FIFO_CONF.AUTOFLUSH_CRC
is 1, the LLE sends a discard RX FIFO command to remove the packet from the RX FIFO.
A packet where the length is equal to the address size contains no payload. Such a packet is known as an
empty packet. If PRF_FIFO_CONF.AUTOFLUSH_EMPTY is 1 and an empty packet is received, the LLE
sends a discard RX FIFO command to remove the empty packet from the RX FIFO.
Note that if the CRC length is 1 byte, the CRC check is not correct for empty packets if fixed length is
configured or no address bytes are used.
If the RX FIFO becomes full while receiving a packet, the packet is discarded from the FIFO and no more
bytes are stored in the RX FIFO, but the packet is received to its end. After that, it is checked whether the
packet would be discarded from the RX FIFO anyway due to the setting of PRF_FIFO_CONF. If so, the
task proceeds as normally. Otherwise, an RXFIFOFULL error interrupt is raised in lieu of the normal
interrupt for received packets.
After receiving a packet, the LLE raises an interrupt to the MCU. Depending on CRC result and whether
the packet was empty, the interrupts are generated as shown in
interrupt is not raised as described previously. The table also shows which of the counters among the
RAM registers are to be updated.
Table 25-16. Interrupt and Counter Operation for Received Messages
CRC Result
OK
OK
NOK
NOK
An address entry should not be modified while the receiver is running. In order to modify, stop the
receiver, modify the entry or entries, and restart the receiver.
25.9.2.3.2 Auto Mode
This section describes the receive operation if PRF_TASK_CONF.MODE is 10 or 11.
If PRF_PKT_CONF.ADDR_LEN is 1, the address byte is compared against PRF_ADDR_ENTRYn.ADDRESS,
where n ranges from 0 to 7. It is compared against PRF_ADDR_ENTRYn.ADDRESS for the values of n
where the entry is enabled for the received sync word. If there is a matching entry, this entry is used when
receiving the packet, otherwise reception is stopped and the device goes back to sync search. If
PRF_PKT_CONF.ADDR_LEN is 0, the first entry that is enabled for the received sync word is used.
SWRU191F – April 2009 – Revised April 2014
Submit Documentation Feedback
Payload Length > Address
Length
No
Yes
No
Yes
Copyright © 2009–2014, Texas Instruments Incorporated
Table
25-16, provided an RXFIFOFULL
Counter Incremented
PRF_ADDR_ENTRYn.N_RXOK
PRF_ADDR_ENTRYn.N_RXOK
PRF_ADDR_ENTRYn.N_RXNOK
PRF_ADDR_ENTRYn.N_RXNOK
Link Layer Engine
Interrupt Raised
RXEMPTY
RXOK
RXNOK
RXNOK
CC2541 Proprietary Mode Radio
307

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