Address Structure For Auto Mode - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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Name
PRF_RADIO_CONF
PRF_ENDCAUSE
Name
CONF
0x00
RXLENGTH
0x01
ADDRESS
0x02
SWRU191F – April 2009 – Revised April 2014
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Table 25-4. RAM-Based Registers (continued)
Addr
0x607E
0x607F
Table 25-5. Address Structure for Auto Mode
Index
Prot
Sem1
Sem1
Sem1
Copyright © 2009–2014, Texas Instruments Incorporated
Prot
Configure radio hardware
Bits 0–1: RXCAP
00: Do not capture on RX packets
01: Capture start of every RX packet
10: Capture end of every RX packet
11: Capture start of first RX packet only
Bits 2–3: TXCAP
00: Do not capture on TX packets
01: Capture start of every TX packet
10: Capture end of every TX packet
11: Capture start of first TX packet only
Bits 4–5: TXIF: TX IF configuration (for 2 Mbps
only)
Sem0
00: Zero IF
01: ±1 MHz IF
10: ±2 MHz IF
11: ±3 MHz IF
Bit 6: DCOFF: Special dc offset handling
0: Standard dc offset
1: Use special dc offset routine measuring dc offset
right after RX start
Bit 7: DCWB: Write back dc offset estimate to
override registers
0: Do not write back
1: Write back after each received packet with CRC
OK
None
Reason why LLE ended task
Description
Bit 0: ENA0 (Enable for primary sync word – RX task only)
0: Disable address entry for primary sync word
1: Enable address entry for primary sync word
Bit 1: ENA1 (Enable for secondary sync word – RX task only)
0: Disable address entry for secondary sync word
1: Enable address entry for secondary sync word
Bit 2: REUSE (Allow reuse of transmitted packet)
0: LLE deallocates packet after it has been acknowledged
1: LLE does not deallocate packet after it has been acknowledged
(this is up to the MCU)
Bit 3: AA (Enable auto acknowledgement or auto retranmsmission)
0: Disable auto ack (RX) or auto retransmission (TX) for this address
1: Enable auto ack (RX) or auto retransmission (TX) for this address
Bit 4: VARLEN (variable length support)
0: Use fixed length given by RXLENGTH in receiver when receiving
packets or ACKs
1: Use variable length up to RXLENGTH in receiver when receiving
packets or ACKs
Bit 5: FIXEDSEQ (fixed sequence number – TX task only)
0: Insert sequence number from SEQSTAT.SEQ
1: Read sequence number from TX FIFO
Bit 6: TXLEN
0: Insert packet length in header when transmitting
1: Used fixed-length word when transmitting
Note: Must not be set to 1 unless the peer uses fixed length
Maximum length of received packet (0–127)
Address of packet
RF Core Data Memory
Description
CC2541 Proprietary Mode Radio
289

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