Rxfifo; Txfifo; Frame-Filtering And Source-Matching Memory Map; Frame Filtering And Source Matching Memory Map - Texas Instruments CC253x User Manual

Memory Map

23.4.1 RXFIFO

The RXFIFO memory area is located at addresses 0x6000 to 0x607F and is thus 128 bytes. Although this
memory area is intended for the RXFIFO, it is not protected in any way, so it is still accessible in the
XREG memory space. Normally, only the designated instructions should be used to manipulate the
contents of the RXFIFO. The RXFIFO can contain more than one frame at a time.

23.4.2 TXFIFO

The TXFIFO memory area is located at addresses 0x6080 to 0x60FF and is thus 128 bytes. Although this
memory area is intended for the TXFIFO, it is not protected in any way, so it is still accessible in the
XREG memory space. Normally, only the designated instructions should be used to manipulate the
contents of the TXFIFO. The TXFIFO can only contain one frame at a time.

23.4.3 Frame-Filtering and Source-Matching Memory Map

The frame-filtering and source-address-matching functions use a 128 byte block of the RF Core RAM to
store local-address information and source-matching configuration and results; this is located in the area
0x6100 to 0x617F. This memory space is described in
word are in the least-significant part of the byte or word. Note that the values in these registers are
unknown after reset. However, the values are retained during power modes.
ADDRESS REGISTER/VARIABLE
0x6176–0x617F
0x6174–0x6175
0x6172–0x6173
0x616A–0x6171
0x6169 SRCSHORTPENDEN2
0x6168 SRCSHORTPENDEN1
0x6167 SRCSHORTPENDEN0
0x6166 SRCEXTPENDEN2
0x6165 SRCEXTPENDEN1
0x6164 SRCEXTPENDEN0
0x6163
214 CC253x Radio
Table 23-1. Frame Filtering and Source Matching Memory Map
ENDIAN
Temporary storage
LOCAL ADDRESS INFORMATION
SHORT_ADDR LE
PAN_ID LE
EXT_ADD LE
SOURCE ADDRESS MATCHING CONTROL
SOURCE ADDRESS MATCHING RESULT
SRCRESINDEX
Copyright © 2009–2014, Texas Instruments Incorporated
Table 23-1. Values that do not fill an entire byte or
DESCRIPTION
RESERVED
Memory space used for temporary storage of variables
The short address used during destination address filtering
The PAN ID used during destination address filtering
The IEEE extended address used during destination address filtering
8 MSBs of the 24-bit mask that enables and disables automatic
pending for each of the 24 short addresses
8 middle bits of the 24-bit mask that enables and disables automatic
pending for each of the 24 short addresses
8 LSBs of the 24-bit mask that enables and disables automatic
pending for each of the 24 short addresses
8 MSBs of the 24-bit mask that enables and disables automatic
pending for each of the 12 extended addresses. Entry n is mapped to
SRCEXTPENDEN[2n]. All SRCEXTPENDEN[2n + 1] bits are don't
care.
8 middle bits of the 24-bit mask that enables and disables automatic
pending for each of the 12 extended addresses. Entry n is mapped to
SRCEXTPENDEN[2n]. All SRCEXTPENDEN[2n + 1] bits are don't
care.
8 LSBs of the 24-bit mask that enables and disables automatic
pending for each of the 12 extended addresses. Entry n is mapped to
SRCEXTPENDEN[2n]. All SRCEXTPENDEN[2n + 1] bits are don't
care.
The bit index of the least-significant 1 in SRCRESMASK, or 0x3F when
there is no source match. On a match, bit 5 is 0 when the match is
on a short address and 1 when it is on an extended address. On a
match, bit 6 is 1 when the conditions for automatic pending bit in
acknowledgment have been met (see the description of
SRCMATCH.AUTOPEND). The bit gives no indication of whether or not
the acknowledgment actually is transmitted, and does not take the
PENDING_OR register bit and the SACK, SACKPEND, and SNACK
strobes into account.
SWRU191F – April 2009 – Revised April 2014
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