Debug Configuration; Debug Status; Burst Write Command (First 2 Bytes) - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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BURST_WRITE Command
1
0
0
0

3.3.1 Debug Configuration

The commands WR_CONFIG and RD_CONFIG are used to access the debug-configuration data byte.
The format and description of this configuration data are shown in
Bit
Name
7:6 –
5
SOFT_POWER_MODE
4
3
TIMERS_OFF
2
DMA_PAUSE
1
TIMER_SUSPEND
0

3.3.2 Debug Status

A debug-status byte is read using the READ_STATUS command. The format and description of this
debug status is shown in
The READ_STATUS command is, for example, used for:
Polling the status of the chip erase (CHIP_ERASE_BUSY) after a CHIP_ERASE command.
Checking whether the oscillator is stable (OSCILLATOR_STABLE); required for debug commands
HALT, RESUME, DEBUG_INSTR, STEP_REPLACE, and STEP_INSTR.
Bit
Name
7
CHIP_ERASE_BUSY
SWRU191F – April 2009 – Revised April 2014
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0
b10
b9
b8
Figure 3-5. Burst Write Command (First 2 Bytes)
Table 3-2. Debug Configuration
Reset
00
Reserved
1
When set, the digital voltage regulator is not turned off during PM2 and PM3. If this bit
is cleared, the debug interface is reset during PM2 and PM3.
0
Reserved
Disable timers. Disable timer operation. This overrides the TIMER_SUSPEND bit and its
0
function.
0: Do not disable timers
1: Disable timers
1
DMA pause. The DMA registers must not be accessed while this bit is set.
0: Enable DMA transfers
1: Pause all DMA transfers
1
Suspend timers.
Suspend timers when the chip is halted. The timers are also suspended during debug
instructions. When executing a STEP, the timers receive exactly (or as close as
possible) as many ticks as they would if the program were free-running.
0: Do not suspend timers
1: Suspend timers
0
Reserved. Always write 0.
Table
3-3.
Table 3-3. Debug Status
Reset
0
Flash chip erase busy
The signal is only high when a chip erase is in progress. It goes high immediately after a
CHIP_ERASE command is received and returns to low when the flash is fully erased.
0: –
1: Chip erase in progress
Copyright © 2009–2014, Texas Instruments Incorporated
Parameter
b7
b6
b5
b4
Table
3-2.
Description
Description
Debug Commands
b3
b2
b1
b0
T0306-01
Debug Interface
55

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