Slave Transmitter Mode - Texas Instruments CC253x User Manual

Operation
When a START condition is detected on the bus, the I
compares it against its own address stored in I2CADDR.ADDR. If the compare is successful, an interrupt is
generated and the I2CCFG.SI bit is set. The same is done for a general call address match if the
I2CADDR.GC bit is set.
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20.1.4.1.1 I C Slave Transmitter Mode
Slave transmitter mode is entered when the slave address transmitted by the master is identical to the
address of this device with a set R/W bit. The slave transmitter shifts the serial data out on SDA with the
clock pulses that are generated by the master device. The slave device does not generate the clock, but it
does hold SCL low. A CPU intervention is required after a byte has been transmitted by the slave device.
If the master requests data from the slave, the I
I2CCFG.SI is set. The SCL line is held low until the first data to be sent is written into the data buffer,
I2CDATA. Then the address is acknowledged and the data is transmitted. After the data is acknowledged
by the master, the bus is stalled during the acknowledge cycle by holding SCL low until new data is written
into I2CDATA. If the master sends a NACK, the I
Table 20-1 provides more details regarding the slave transmitter operation.
Status
Code Status of the
2
(Value of I C
I2CSTAT)
0xA8 Own SLA+R
has been
received; ACK
has been
returned.
0xB0 Arbitration lost
in SLA+R/W as
master; own
SLA+R has
been received;
ACK has been
returned.
0xB8 Data byte has
been
transmitted;
ACK has been
received.
0xC0 Data byte has
been
transmitted;
not-ACK has
been received.
172
2
I C
2
C module is automatically configured as a transmitter, and
2
C module returns to the not-addressed slave state.
Table 20-1. Slave Transmitter Mode
Application Software Response
To I2CCFG
To or From
I2CDATA
STA STO
Load data byte X 0
or X 0
load data byte
Load data byte X 0
or X 0
load data byte
Load data byte X 0
or X 0
load data byte
No action 0 0
or 0 0
no action
or 1 0
no action
or 1 0
no action
Copyright © 2009–2014, Texas Instruments Incorporated
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C module receives the transmitted address and
Next Action Taken by I
SI AA
0 0 Last data byte is transmitted and ACK is received.
0 1 Data byte is transmitted; ACK is received.
0 0 Last data byte is transmitted and ACK is received.
0 1 Data byte is transmitted; ACK is received.
0 0 Last data byte is transmitted and ACK is received
0 1 Data byte is transmitted; ACK is received.
0 0 Switched to not-addressed SLV mode; no
recognition of own SLA or general call address
0 1 Switched to not-addressed SLV mode; own SLA or
general-call address is recognized.
0 0 Switched to not-addressed SLV mode; no
recognition of own SLA or general call address;
START condition is transmitted when the bus
becomes free.
0 1 Switched to not-addressed SLV mode; own SLA or
general-call address is recognized; START
condition is transmitted when the bus becomes
free.
SWRU191F – April 2009 – Revised April 2014
www.ti.com
2
C Hardware
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