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Checking the sync word is done in a two-stage process. First, a correlation value is calculated. If this
correlation is above a programmable threshold, a data decision of the received sync word is done. It can
be programmed in MDMCTRL3.SYNC_MODE whether this data decision is to be ignored, no bit errors are to
be accepted, or one bit error is to be accepted. The correlation threshold value is programmed in
MDMCTRL1.CORR_THR. This threshold value should depend on the sync word length. As a rule of thumb,
a value of 0.25 times the number of bits (rounded down) can be used.
For the bit synchronization to work well, some guidelines should be followed for the sync word. It should
have enough transitions, but not long runs of 10 1010... or other short, repeated patterns. Generally, a
longer sync word gives better performance.
The CC2541 devices have support for two independent sync words. The primary and secondary sync
words are specified in two sets of registers. The secondary sync word can be enabled by the
SW_CONF.DUAL_RX bit, and if enabled, the received signal is correlated against both sync words. If the
correlation with one of the sync words is above the threshold, data decision is done against that sync
word.
While the receiver is running, a received signal strength indicator (RSSI) is updated. The RSSI is available
some time after the receiver is started, regardless of whether sync is found. It can be read from the RSSI
register, which is 0x80 when no RSSI is available. The value given is in the range 0 to approximately 64,
with a change of 1 corresponding to a 1-dB change. The offset from a true dBm value depends on the
receiver mode and can be found in the device data sheet. For high received signal levels, the reported
RSSI saturates at one of the highest possible reported values. The accuracy and update time of the RSSI
can be traded off using MDMTEST0.RSSI_ACC. The RSSI can be calculated over a window of 5.33 µs or
21.3 µs, and 1, 2, or 4 such windows can be averaged to give the result. Using a longer average time
gives higher accuracy, but it takes longer before a result is ready, and doing the average over a longer
time means that the result may be wrong for short packets. An average of n windows of length t
only be used for packets lasting longer than (n + 1) t
The receiver must run dc offset estimation and removal. The dc offset estimation mode can be controlled
with MDMTEST0.DC_BLOCK_MODE. For data rates of 1 Mbps and lower, where the receiver runs on a low
IF, it is recommended to use the default setting for this register (continuous estimation). For 2 Mbps,
where the receiver runs on zero IF, delayed dc offset estimation should normally be used. This causes the
dc offset estimation to be done in front of the packet. The delay can be controlled through
MDMTEST0.DC_BLOCK_LENGTH and MDMTEST1.DC_DELAY. The recommendation is to set
MDMTEST0.DC_BLOCK_LENGTH to 11 (128 samples) and MDMTEST1.DC_DELAY to 00 (5 delays), which
allows for up to approximately 105 µs of energy in front of the packet payload, including the preamble and
sync word. As an alternative for 2 Mbps, dc offset estimation can be turned off, and a previously found
value can be used, written into the DC_I_L, DC_I_H, DC_Q_L, and DC_Q_H registers. Values can be
found in advance, but differ for each frequency. For auto acknowledgments and other packets that are
received at a known time, the LLE can perform a special dc offset algorithm as described in
Section
25.9.2.
25.8 Packet Format
The packet format is configurable. There are two operation modes for radio packet control, basic mode
and auto mode. Of these, only auto mode supports automatic acknowledgment and retransmissions. The
LLE-controlled part of the packet format is also different for the two modes. In basic mode, there is an
optional length field followed by an optional address of 1 byte, as shown in
there is a 9-bit or 10-bit header field containing length and sequence number information. This format is
shown in
Figure
25-7. The figures show the packet formats with their configurability. The fields with a
header in gray are controlled directly by the modem and are used in the acquisition of received packets.
The fields with header in white are controlled by the LLE.
Preamble
1–16 bytes
Handled by modem
SWRU191F – April 2009 – Revised April 2014
Submit Documentation Feedback
Sync word
Length
16–32 bits
0–1 byte
Figure 25-6. Air Interface Packet Format for Basic Mode
Copyright © 2009–2014, Texas Instruments Incorporated
(including preamble, sync word, and CRC).
RSSI
Figure
Address
Payload
0–1 byte
0–255 bytes
CC2541 Proprietary Mode Radio
Packet Format
should
RSSI
25-6. In auto mode,
CRC
0–4 bytes
R0009-01
297
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