Coprocessor Mode; Register Settings For Some Commonly Used Crcs, Assuming Initialization With All 1S - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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Table 25-9. Register Settings for Some Commonly Used CRCs, Assuming Initialization With All 1s
Order
PRF_CRC_LEN
8
1
8
1
16
2
16
2
24
3
32
4

25.4.4 Coprocessor Mode

The coprocessor mode is used to run the BSP as a stand-alone and not part of the signal path. It must not
be used while the LLE is running. Coprocessor mode is selected by setting BSP_MODE.CP_MODE to 01 or
11. In these modes, one byte to be processed is written to the BSP_DATA register, and the result of
processing this byte can later be read back from the same register. When BSP_MODE.CP_MODE is 01, the
coprocessor is in receive mode, where the whitener is applied before the CRC. When
BSP_MODE.CP_MODE is 11, the coprocessor is in transmit mode, where the whitener is applied after the
CRC.
To apply the BSP operations to a byte, write it to the BSP_DATA register. When this register is written to,
the BSP_MODE.CP_BUSY bit goes high.
If CP_MODE.CP_END is 0, the first bit provided is the LSB and the last bit is the MSB. If CP_MODE.CP_END
is 1, the first bit provided is the MSB and the last bit is the LSB.
When BSP_MODE.CP_BUSY goes low, the processed data can be read from the BSP_DATA register. If one
or both whiteners are enabled, this byte is whitened or de-whitened. Otherwise, it is the same as the byte
written, except if the CRC is being read as described in the following text.
To read out a CRC in transmit mode, set BSP_MODE.CP_READOUT to 1. A zero must be written to the
BSP_DATA register, and when BSP_MODE.CP_BUSY goes low, a CRC byte can be read from BSP_DATA.
This should be repeated for each CRC byte. If whitening is enabled, the read back CRC bytes are
whitened.
The BSP must not be set in coprocessor mode while the LLE is processing a packet.
SWRU191F – April 2009 – Revised April 2014
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CRC
8
2
CRC-8-ATM x
+ x
+ x + 1
8
7
6
4
2
CRC-8 x
+ x
+ x
+ x
+ x
+ 1
16
CRC-16 (used in CC2500) x
+ x
2
x
+ 1
16
12
5
CRC-16-CCITT x
+ x
+ x
+ 1
24
22
20
19
18
CRC-24 x
+ x
+ x
+ x
+ x
14
13
11
10
8
7
+ x
+ x
+ x
+ x
+ x
+ x
+ x
+ x + 1
32
26
CRC-32-IEEE 802.3 x
+ x
+ x
22
16
12
11
10
8
x
+ x
+ x
+ x
+ x
+ x
+ x
4
2
+ x
+ x
+ x + 1
Copyright © 2009–2014, Texas Instruments Incorporated
BSP_Px
BSP_P0
PRF_CRC_INIT[0]
= 0x00
BSP_P1
PRF_CRC_INIT[1]
= 0x00
BSP_P2
PRF_CRC_INIT[2]
= 0x00
BSP_P3
PRF_CRC_INIT[3]
= 0x07
BSP_P0
PRF_CRC_INIT[0]
= 0x00
BSP_P1
PRF_CRC_INIT[1]
= 0x00
BSP_P2
PRF_CRC_INIT[2]
= 0x00
BSP_P3
PRF_CRC_INIT[3]
= 0xD3
BSP_P0
PRF_CRC_INIT[0]
= 0x00
BSP_P1
PRF_CRC_INIT[1]
15
= 0x00
+
BSP_P2
PRF_CRC_INIT[2]
= 0x05
BSP_P3
PRF_CRC_INIT[3]
= 0x80
BSP_P0
PRF_CRC_INIT[0]
= 0x00
BSP_P1
PRF_CRC_INIT[1]
= 0x00
BSP_P2
PRF_CRC_INIT[2]
= 0x21
BSP_P3
PRF_CRC_INIT[3]
= 0x10
BSP_P0
PRF_CRC_INIT[0]
= 0x00
16
+ x
BSP_P1
PRF_CRC_INIT[1]
= 0xCB
6
3
+ x
BSP_P2
PRF_CRC_INIT[2]
= 0x6D
BSP_P3
= 0x5D
PRF_CRC_INIT[3]
BSP_P0
PRF_CRC_INIT[0]
= 0xB7
23
+
BSP_P1
PRF_CRC_INIT[1]
= 0x1D
7
5
+ x
BSP_P2
PRF_CRC_INIT[2]
= 0xC1
BSP_P3
= 0x04
PRF_CRC_INIT[3]
CC2541 Proprietary Mode Radio
Bit-Stream Processor
PRF_CRC_INIT
= 0x00
= 0x00
= 0x00
= 0xFF
= 0x00
= 0x00
= 0x00
= 0xFF
= 0x00
= 0x00
= 0xFF
= 0xFF
= 0x00
= 0x00
= 0xFF
= 0xFF
= 0x00
= 0xFF
= 0xFF
= 0xFF
= 0xFF
= 0xFF
= 0xFF
= 0xFF
295

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