Cc2541 Block Diagram - Texas Instruments CC253x User Manual

Overview
RESET_N
XOSC_Q2
XOSC_Q1
P2_4
P2_3
P2_2
P2_1
P2_0
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
SDA
SCL
20
Introduction
RESET WATCHDOG TIMER
32-MHZ
CRYSTAL OSC
CLOCK MUX and
CALIBRATION
32.768-kHz
CRYSTAL OSC
DEBUG HIGH SPEED
INTERFACE RC-OSC
PDATA
XRAM
8051 CPU
CORE
IRAM
SFR
UNIFIED
DMA
IRQ
CTRL
ANALOG COMPARATOR
OP-
AES
ENCRYPTION
and
DS ADC
DECRYPTION
AUDIO / DC
2
I C
USART 0
USART 1
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
TIMER 3 (8-bit)
TIMER 4 (8-bit)
Figure 1-3. CC2541 Block Diagram
Copyright © 2009–2014, Texas Instruments Incorporated
ON-CHIP VOLTAGE
REGULATOR
POWER-ON RESET
BROWN OUT
POWER MGT. CONTROLLER
32-kHz
RC-OSC
MEMORY
ARBITRATOR
FIFOCTRL
RADIO
REGISTERS
Link Layer Engine
DEMODULATOR
RECEIVE
RF_P RF_N
SWRU191F – April 2009 – Revised April 2014
www.ti.com
VDD (2 V–3.6 V)
DCOUPL
SLEEP TIMER
RAM SRAM
FLASH FLASH
FLASH CTRL
1-KB SRAM
MODULATOR
TRANSMIT
DIGITAL
ANALOG
MIXED
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