Timer 2 Registers - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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Timer 2 Registers

Calculation of New Timer Value and Overflow Count Value
N
= Current Sleep Timer value
c
N
= Stored Sleep Timer value
ST
K
= Clock ratio = 976.5625
ck
stw = Sleep Timer width = 24
P
= Timer 2 period
T
P
= Overflow period
OVF
O
= Stored overflow-count value
ST
O
= Overflow ticks while sleeping
TICK
t
= Stored timer value
ST
T
= Overhead = 86
OH
N
= N
– N
t
c
ST
stw
N
≤ 0 → N
= 2
t
d
C = N
× K
+ T
d
ck
ST
T = C mod P
T
Timer2Value = T
(
)
C T
-
O
=
TICK
P
T
O = (O
+ O
) mod P
TICK
ST
Timer2OverflowCount = O
(1)
Clock ratio of Timer 2 clock frequency (32 MHz) and Sleep Timer clock frequency (32 kHz)
For a given Timer 2 period value, P
start for which the timer value is correctly updated after starting. The maximum value is given in terms of
the number of Sleep Timer clock periods, that is, 32-kHz clock periods, t
24
(2
t
£
ST(max)
22.5 Timer 2 Registers
The SFR registers associated with Timer 2 are listed in this section. These registers are the following:
• T2MSEL
• T2M1
• T2M0
• T2MOVF2
• T2MOVF1
• T2MOVF0
• T2IRQF
• T2IRQM
• T2EVTCFG – Timer 2 event output configuration
• T2CTRL
202
Timer 2 (MAC Timer)
(1)
+ N
; N
> 0 → N
= N
t
t
d
t
+ T
(rounded to nearest integer value)
OH
OVF
, there is a maximum duration between Timer 2 synchronous stop and
T
1) P
T
- ´
+
T
OH
K
ck
– Timer 2 multiplexed register control
– Timer 2 multiplexed count high
– Timer 2 multiplexed count low
– Timer 2 multiplexed overflow count 2
– Timer 2 multiplexed overflow count 1
– Timer 2 multiplexed overflow count 0
– Timer 2 interrupt flags
– Timer 2 interrupt masks
– Timer 2 configuration
Copyright © 2009–2014, Texas Instruments Incorporated
.
ST(max)
SWRU191F – April 2009 – Revised April 2014
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