Description; Register; Analog Comparator - Texas Instruments CC253x User Manual

System-on-chip for 2.4ghz
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19.1 Description

The analog comparator is connected to the I/O pins as follows:
The positive input pin is connected to P0_5.
The negative input pin is connected to P0_4.
The output can be read from CMPCTL.OUTPUT.
The comparator pins must be configured as analog pins by setting bits APCFG[5:4] to 1. The
CMPCTL.EN bit is used to enable or disable the comparator. The output from the comparator is connected
internally to the edge detector that controls P0IFG[5]. This makes it possible to associate an I/O interrupt
with a rising or falling edge on the comparator output. When enabled, the comparator remains active while
in power mode 2 or 3. Thus, it is possible to wake up from power mode 2 or 3 on a rising or falling edge
on the comparator output.
P0_4
(Pad)
P0_5
(Pad)

19.2 Register

This section describes the registers for the analog comparator.
A
CMPCTL (0x62D0) – Analog Comparator Control and Status
Bit
Name
7:2
1
EN
0
OUTPUT
SWRU191F – April 2009 – Revised April 2014
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ENB
Pad I/O Driver
EN
+
Analog
Comparator
ENB
Pad I/O Driver
Figure 19-1. Analog Comparator
Reset
R/W
Description
0000 00
R0
Reserved
0
R/W
Comparator enable
0
R
Comparator output
Copyright © 2009–2014, Texas Instruments Incorporated
CMPCTL.EN
1
Edge Detector
for P0_5
0
S0385-01
Description
167

Analog Comparator

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